ADAR4002ACPZ-R7 datasheet(46/66 Pages) AD

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Data Sheet

ADAR4002

APPLICATIONS INFORMATION

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Rev. A | 46 of 66

DEVICE SETUP

Basic SPI Setup with Single DSA and TDU

To set the ADAR4002 up in SPI mode and use both sequencers,

first ensure that the MODE pin is pulled to ground. Then, perform

the following writes in Table 11. To change DSA and TDU data write

new data into Register 0x20 and Register 0x21, followed by a data

load and update. This setup is useful when first learning the device

and/or for debugging.

Table 11. SPI Setup for Single Register

Address

Data

Notes

0x00

0xBD

Soft reset, MSB first, DATA_O enabled

0x00

0x18

SDO active (for 4-wire SPI)

0x10

0x00

Sequencer A start at 0

0x11

0x00

Sequencer A stop at 0

0x14

0x11

Sequencer A and Sequencer B direction

ascending

0x16

0x00

Sequencer A selection (data = 0x01 for

Sequencer B selection)

0x20

0x00

Minimum time delay for TD00, Time Delay

Range 0

0x21

0x00

Minimum attenuation for DSA00

0x98

0x01

Load data from the first rank to second rank

registers

0x99

0x01

Update, applies data to DSA and TDU blocks

SPI Setup and Example Use of Sequencers

To set the ADAR4002 up in SPI mode and use both sequencers,

first ensure that the MODE pin is pulled to ground. Then, perform

the following writes in Table 12.

Table 12. SPI Setup and Example Use of Sequencers

Address

Data

Notes

0x00

0xBD

Soft reset, MSB first, DATA_O enabled

0x00

0x18

SDO active (for 4-wire SPI)

0x10

0x00

Sequencer A start at 0

0x11

0xF

Sequencer A stop at 15

0x12

0x01

Sequencer B start at 16

0x13

0x1F

Sequencer B stop at 31

0x14

0x11

Sequencer A and Sequencer B direction

ascending

0x16

0x00

Select Sequencer A

0x20 to 0x5F

0xXX

Write desired data to all 32 TDU and DSA

states

0x98

0x01

Load data from the first rank to second rank

registers

0x99

0x01

Update, applies TD00 and DSA00 data to

the DSA and TDU blocks

0x99

0x01

Update, applies TD01 and DSA01 data to

the DSA and TDU blocks

Table 12. SPI Setup and Example Use of Sequencers (Continued)

Address

Data

Notes

0x99

0x01

Update, applies TD02 and DSA02 data to

the DSA and TDU blocks

0x16

0x01

Select Sequencer B

0x99

0x01

Update, applies TD016 and DSA16 data to

the DSA and TDU blocks

0x99

0x01

Update, applies TD017 and DSA17 data to

the DSA and TDU blocks

0x99

0x01

Update, applies TD018 and DSA18 data to

the DSA and TDU blocks

0x15

0x11

Reset both sequencers

0x16

0x00

Select Sequencer A

0x99

0x01

Update, applies TD00 and DSA00 data to

the DSA and TDU blocks

Shift Register Setup

To set the ADAR4002 to shift register mode, first pull the MODE

pin to logic high. Then, use the CLK_IN and DATA_IO pins for the

clock and data input, respectively. Clock the desired 14-bit TDU and

DSA data sequence as shown in Figure 8, followed by a pulse on

the UPDATE pin to load the data from the first shift register to the

second shift register, and apply the data to the TDU and DSA.

DIGITAL INTERFACE FOR MULTIPLE CHIP

OPERATION

SPI Mode Block Diagram

Figure 129 shows the SPI mode block diagram.

Figure 129. Multiple Chip Configuration in SPI Mode (Mode Pin = Logic Low)

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