SPSB100 datasheet(39/214 Pages) STMICROELECTRONICS

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The input signal is filtered with a filter time of tWU_cyc (tIGN_cyc ) after a delay (80% of the configured timer on-

time). A wake-up will be processed if the status has changed versus the previous cycle, therefore wake-up status

WU_WAKE and IGN_WAKE bits are set only if the status during consecutive on-time is different, after configured

delay and tWU_cyc. (tIGN_cyc). This can be done only if WU_CONFIG and IGN_CONFIG are configured as wake-

up inputs.

In active low power or DEEP-SLEEP modes the inputs WU and IGN are configurable with an internal pull-up or

pull-down current source according to the setup WU_PU and IGN_PU SPI bits.

In active full power mode the inputs have an internal pull-down resistor (RWU_act) and the inputs status can be

read by WU_STATE and IGN_STATE. This can be done only if WU_CONFIG and IGN_CONFIG are configured

as wake-up inputs and if WU_ENA and IGN_ENA are set high.

The output OUT_HS can be used to supply the external contacts with the timer setting according to the cyclic

monitoring of the wake-up input.

If WU_ENA = 1 and WU_CONFIG = 1, the wake up capability and the voltage measurement through ADC are

both activated on WU pin.

If IGN_ENA = 1 and IGN_CONFIG = 1, the wake up capability and the voltage measurement through ADC are

both activated on IGN pin.

3.10

Configurable time-out window watchdog

During normal operation, the watchdog monitors the microcontroller within a programmable trigger cycle.

After the power-up sequence, the watchdog starts with a long open window tLW. The watchdog allows the

microcontroller to run its own setup and then to start the window watchdog by setting WD_TRIG=1.

Long open window tLW is configurable by USER-NVM through the bits LOW_SET [3..0].

Subsequently, the microcontroller has to serve the watchdog by alternating the watchdog trigger bit within the safe

trigger area Tswx.. The trigger time is configurable by SPI.

A correct watchdog trigger signal will immediately start the next cycle.

A watchdog trig will not take into account if NRST pin is low.

If LOW_SET [3..0] is set at “1111”, the long open window is set in infinite duration. In this case, if the application

does not require a watchdog, the microcontroller must not trig the watchdog. So, the device will transit from

REC-1 to active full power after a read and clear of error flags. If the watchdog is triggered even with LOW_SET

[3..0] set to “1111”, the watchdog starts with the default window and then has to be served. Note that in the case

of LOW_SET = 1111, so in the case of the watchdog service is disabled, it must be considered in the safety

analysis based on FIT calculation, as described in the safety manual.

The watchdog trigger time can be configured by setting the WD_TIME [3..0] bits (only after

SPI_PROTECT_ACCESS has been set) and the default value is 0001 (window 2). The change of watchdog

window timing through WD_TIME in SPI registers cannot be done when the watchdog is in long open window

counting.

The microcontroller can read the LOW_STATUS bit to know if the watchdog is in long open window phase (when

LOW_STATUS is high) or in normal window (when LOW_STATUS is low). When in long open window phase, the

LOW_STATUS bit is high even if the watchdog is in infinite long open window. When not in infinite long open

window, if FSM is in ACTIVE_HP or ACTIVE_LP state, the LOW_STATUS is low and watchdog counts in normal

window. When LOW_STATUS is high, the current watchdog LOW is given by LOW_SET[3:0]. When

LOW_STATUS is low, the current watchdog window is given by WD_TIME_STATUS[3:0]. During REC-1 FSM

state, WD_TIME[3:0] cannot be written because the watchdog is counting in long open window.

In the case of WD_FAIL or FCCU_FAIL occurs the watchdog starts in long open window when NRST rises. In this

case, the watchdog trig bit is automatically cleared. So, the microcontroller can trig the watchdog with a

WD_TRIG bit high.

The new value of WD_TIME is loaded in the watchdog module on the next trig event after the SPI configuration.

The following watchdog cycle uses the new programmed value.

This means that when a watchdog is running on a current window, to change the window, the microcontroller

must:

•

Write in WD_TIME(3-0) the new watchdog window.

•

Trig the watchdog in the current window.

Doing this, the watchdog restarts using the new window.

SPSB100

Functional description

DS14640 - Rev 1

page 39/214

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