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AS7331

Functional Description

Datasheet

• PUBLIC

DS001047

• v4-00 • 2023-Mar-24

│ 21

Figure 15:

Principle Sequence for a Measurement Start in CMD Mode Coming From Configuration State

7.2.3

Synchronous Measurement Mode

– SYNS

In this measurement mode, the input pin, SYN, acts as a trigger event for the start of A/D conversion.

The falling edge at the SYN pin starts the measurement. The conversion time (TCONV) is determined by

the content of the register CREG1:TIME (see Figure 48). The READY pin signalizes the progress of

conversion (see Figure 16), its rising edge shows the end of conversion and its available valid results.

The data fetch should be performed between the rising edge of signal READY and the next falling

edge of signal SYN, in order to allow distortion-free measurements. SYN pulses during the

programmed pause time TBREAK are ignored to avoid a start of the measurement during a running data

fetch. The bit OSR:SS also takes effect in the SYNS mode, because the start of the measurement is

only possible with OSR

:SS = “1”.

Figure 16 shows the principle sequence for a measurement to start in SYNS mode, OSR:DOS = 011b

and OS

R:SS = “1” already set and waiting in Measurement state is shown as IDLE.

IDLE

MEASUREMENT 2

RESULTS 1

MEASUREMENT 1

CONFIGURATION

IDLE

TCONV

MRES1

MRES3

READY

STATE

I²C activity

RESULTS 2

TCONV

data

fetch

LDATA = "0"

NDATA = "0"

LDATA = "0"

NDATA = "1"

LDATA = "1"

NDATA = "1"

LDATA = "0"

NDATA = "0"

OSR = 83h

start (OSR:SS

"1")

start (OSR:SS

"1")

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