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CY2DP3120AXIT Folha de dados(PDF) 7 Page - Cypress Semiconductor

Nome de Peças CY2DP3120AXIT
Descrição Electrónicos  1:20 Differential Clock/Data Fanout Buffer
PDF  9 Pages
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Fabricante Electrônico  CYPRESS [Cypress Semiconductor]
Página de início  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY2DP3120AXIT Folha de dados(HTML) 7 Page - Cypress Semiconductor

  CY2DP3120AXIT Datasheet HTML 1Page - Cypress Semiconductor CY2DP3120AXIT Datasheet HTML 2Page - Cypress Semiconductor CY2DP3120AXIT Datasheet HTML 3Page - Cypress Semiconductor CY2DP3120AXIT Datasheet HTML 4Page - Cypress Semiconductor CY2DP3120AXIT Datasheet HTML 5Page - Cypress Semiconductor CY2DP3120AXIT Datasheet HTML 6Page - Cypress Semiconductor CY2DP3120AXIT Datasheet HTML 7Page - Cypress Semiconductor CY2DP3120AXIT Datasheet HTML 8Page - Cypress Semiconductor CY2DP3120AXIT Datasheet HTML 9Page - Cypress Semiconductor  
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FastEdge™ Series
CY2DP3120
Document #: 38-07514 Rev.*C
Page 7 of 9
3. 3V
Zo = 5 0 o h m
3.3V
5"
5"
C Y 2D P 3120
12 0 oh m
12 0 oh m
VC C = 3 . 3 V
VE E = 0 V
LV D S
51 o h m
( 2 p lac es )
33 o h m
( 2 p lac es )
L VPEC L t o
LV D S
Figure 8. Low-voltage Positive Emitter-coupled Logic (LVPECL) to a Low-voltage Differential Signaling (LVDS) Interface
Figure 9. Termination for LVPECL to HTSL interface for VCC=2.5V would use X=50 Ohms, Y=2300 Ohms, and Z=1000
Ohms. See application note titled, “PECL Translation, SAW Oscillators, and Specs” for other signalling standards and
supplies.
VCC
VDD-2
Y
X
Z
One output is shown for clarity
Ordering Information
Part Number
Package Type
Product Flow
CY2DP3120AI
52-pin TQFP
Industrial, –40
° to 85°C
CY2DP3120AIT
52-pin TQFP – Tape and Reel
Industrial, –40
° to 85°C
CY2DP3120AXI
52-pin TQFP - Lead Free
Industrial, –40
° to 85°C
CY2DP3120AXIT
52-pin TQFP – Tape and Reel - Lead Free
Industrial, –40
° to 85°C



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