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FastEdge™ Series
CY2DP3120
Document #: 38-07514 Rev.*C
Page 4 of 9
ECL DC Electrical Specifications
Parameter
Description
Condition
Min.
Max.
Unit
VEE
Negative Power Supply
–2.5V ± 5%, VCC = 0.0V
–3.3V ± 5%, VCC = 0.0V
–2.625
–3.465
–2.375
–3.135
V
VCMR
ECL Input Differential cross point
voltage[8]
Differential operation
VEE + 1.2
0V
V
VOH
Output High Voltage
IOH = –30 mA[10]
–1.25
–0.7
V
VOL
Output Low Voltage
VEE = –3.3V ± 5%
VEE = –2.5V ± 5%
IOL = –5 mA[10]
–1.995
–1.995
–1.5
–1.3
V
VIH
Input Voltage, High
Single-ended operation
–1.165
–0.880 [11]
V
VIL
Input Voltage, Low
Single-ended operation
–1.945 [11]
–1.625
V
VBB[3]
Output Reference Voltage
– 1.620
– 1.220
V
AC Electrical Specifications
Parameter
Description
Condition
Min.
Max.
Unit
VPP
ECL/PECL Differential Input Voltage[8] Differential operation
0.1
1.3
V
FCLK
Input Frequency
50% duty cycle Standard load
1.5
GHz
TPD
Propagation Delay CLKA or CLKB to
Output pair
660 MHz [13]
400
750
ps
VDIF
HSTL Differential Input Voltage[12]
Duty Cycle Standard Load
Differential Operation
0.4
1.9
V
Vo
Output Voltage (peak-to-peak; see
Figure 3)
< 1 GHz
0.375
–
V
VCMRO
Output Common Voltage Range
(typical)
VCC – 1.425
V
tsk(0)
Output-to-output Skew
660 MHz [13], See Figure 3
–
50
ps
tsk(PP)
Part-to-Part Output Skew
660 MHz [13]
–150
ps
TPER
Output Period Jitter (rms)[14]
660 MHz [13]
–1.4
ps
tsk(P)
Output Pulse Skew[]
660 MHz [13], See Figure 3
–
50
ps
TR,TF
Output Rise/Fall Time (see Figure 3)
660 MHz 50% duty cycle
Differential 20% to 80%
0.08
0.3
ns
Notes:
12. VDIF (AC) is the minimum differential HSTL input voltage swing required to maintain AC characteristics including tkpd and device-to-device skew
13. 50% duty cycle; standard load; differential operation
14. For 3.3V supplies. Jitter measured differentially using an Agilent 8133A Pulse Generator with an 8500A LeCroy Wavemaster Oscilloscope using at least 10,000
data points
Output pulse skew is the absolute difference of the propagation delay times: | tPLH – tPHL |.
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