AS3956 datasheet(79/107 Pages) AMSCO

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ams Datasheet

Page 79

[v1-11] 2018-Nov-14

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AS3956 − Detailed Description

Buffer Interrupts and Buffer Status Register

The AS3956 contains a 32 byte buffer. In case of transmission

the Control logic shifts data which was previously loaded by the

external controller to the Framing Block and further to the

Transmitter. During reception, the demodulated data is stored

in the buffer and the external controller can download received

data.

Transmit and receive capability of the AS3956 is limited by the

buffer size. The maximum message size that can be received or

transmitted is 32 bytes. The mutual access to the buffer from

NFC block and SPI / I²C block is not allowed. At the beginning

of each reception the buffer is cleared automatically. Before the

data is loaded into the buffer via SPI / I²C for transmission the

MCU must take care of clearing the buffer.

Five interrupts that can be triggered during read or write of the

buffer:

• When buffer overflow or underflow is detected an

I_bf_err is triggered. The reason for the interrupt can be

distinguished by reading the Buffer Status Register 1.

• Buffer overflow IRQ is not blocked, in case if more than 32

bytes are received from reader or written via SPI / I²C into

buffer the buffer underflow IRQ is produced.

• When data is loaded via data RF an I_rxs and I_rxe are

triggered

• When all data is transmitted an I_txe is triggered

• When buffer is already busy due to another operation in

progress and MCU tries to access the internal buffer an

interrupt I_acc_err shall be triggered.

After data is received, the microcontroller shall check the

amount of bytes actually received. This information is available

in the Buffer Status Register 2, which displays number of bytes

in the buffer not yet read out. Buffer Status Register 1

additionally contains a flag indicating buffer overflow.

AS3956 Folha de dados(PDF) 79 Page - ams AG