| Os motores de busca de Datasheet de Componentes eletrônicos |
|
ADP1048WARQZ-R7 Folha de dados(PDF) 78 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADP1048WARQZ-R7 Folha de dados(HTML) 78 Page - Analog Devices |
|
78 / 82 page ![]() ADP1048W Data Sheet CS ADC OFFSET TRIM FOR 500 mV RANGE REGISTER This register must be unlocked for write access; see Table 61. Table 144. Register 0xFE54—CS ADC Offset Trim for 500 mV Range Bits Bit Name R/W Description [7:0] CS ADC offset trim R/W This register calibrates the CS current sense offset (the offset is always subtracted from the ADC output). CS ADC GAIN TRIM FOR HIGH (750 mV) RANGE REGISTER This register must be unlocked for write access; see Table 61. Table 145. Register 0xFE7E—CS ADC Gain Trim for High (750 mV) Range Bits Bit Name R/W Description 7 Gain polarity R/W 1 = negative gain is introduced. 0 = positive gain is introduced. [6:0] CS ADC gain trim R/W This register calibrates the CS current sense gain. CS ADC OFFSET TRIM FOR HIGH (750 mV) RANGE REGISTER This register must be unlocked for write access; see Table 61. Table 146. Register 0xFE7F—CS ADC Offset Trim for High (750 mV) Range Bits Bit Name R/W Description [7:0] CS ADC offset trim R/W This register calibrates the CS current sense offset (the offset is always subtracted from the ADC output). LATCHED FLAG REGISTERS The bits in the latched flag registers remain set (latched) to allow users to detect an intermittent fault. Reading a latched flag register resets the flags in that register. Table 147. Register 0xFE80—Latched Flag 0 Bits Bit Name R/W Description 7 MAX_MODULATION R 1 = maximum modulation limit is reached. 6 MIN_MODULATION R 1 = minimum modulation limit is reached. 5 OLP R 1 = one of the two voltage dividers is probably disconnected or malfunctioning. 4 FAST_OVP R 1 = the threshold set for the comparator on the OVP pin has been crossed. 3 AC_PERIOD R 1 = controller is not able to detect the ac line period; the maximum value of the period is used and this flag is set. 2 BROWN_OUT R 1 = VAC is lower than the value stored in VIN_ON (Register 0x35). 1 SOFT_START R 1 = system is in soft start sequence; fast loop filter is in use. 0 INRUSH R 1 = INRUSH control relay is off. Table 148. Register 0xFE81—Latched Flag 1 Bits Bit Name R/W Description 7 RSVD R Reserved. 6 EEPROM_UNLOCKED R 1 = EEPROM is unlocked and its contents can be written. 5 EEPROM_CRC R 1 = downloaded EEPROM contents are incorrect. 4 I2C_ADDRESS R 1 = the resistor on the ADD pin has a value that can cause an error in the address assignment (the address falls too close to the threshold between two addresses). 3 LOW_LINE R 1 = input voltage is higher than the high line threshold. 2 FAST_OCP R 1 = the threshold set for the comparator on the ILIM pin has been crossed. 1 SYNC_LOCK R 1 = external synchronization frequency is locked. 0 AC_OK R This flag is a programmable combination of other internal flags and refers to the condition of the input voltage. A value of 1 means that the output of the AC_OK pin is low. Rev. 0 | Page 78 of 82 |
|
Ligação URL |
| ALLDATASHEET é útil para você? [ DONATE ] |
Sobre Alldatasheet | Publicidade | Contato conosco | Privacy Policy | Link para a ficha técnica | roca de Link | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |