ADP1048WARQZ-R7 datasheet(58/82 Pages) AD

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ADP1048W

Data Sheet

OVP_FAST_OVP_RESPONSE REGISTER

This register instructs the device on actions to take due to a fast overvoltage fault condition.

Table 63. Register 0xFE01—OVP_FAST_OVP_RESPONSE

Bits

Bit Name

R/W

Description

[7:6]

Response

R/W

These bits determine the device response to a fast overvoltage condition.

Bit 7

Bit 6

Response

Ignore (do nothing; PWM continues).

Shut down and soft start.

Shut down immediately and wait for the PSON signal.

Disable the PWM output until the unlatched flag is cleared.

[5:0]

RSVD

Reserved.

OLP_RESPONSE REGISTER

This register instructs the device on actions to take due to an open-loop fault condition.

Table 64. Register 0xFE02—OLP_RESPONSE

Bits

Bit Name

R/W

Description

[7:6]

Response

R/W

These bits determine the device response to an open-loop fault condition.

Bit 7

Bit 6

Response

Ignore (do nothing; PWM continues).

Shut down and soft start.

Shut down immediately and wait for the PSON signal.

Disable the PWM output until the unlatched flag is cleared.

[5:0]

RSVD

Reserved.

VDD3P3_RESPONSE REGISTER

This register instructs the device on actions to take due to a VDD overvoltage fault condition.

Table 65. Register 0xFE03—VDD3P3_RESPONSE

Bits

Bit Name

R/W

Description

RSVD

Reserved.

Save first flag ID to

EEPROM

R/W

1 = save the first flag ID to EEPROM when the device shuts down.

0 = do not save the first flag ID to EEPROM when the device shuts down.

[5:3]

Retry wait time

R/W

These bits determine the retry wait time before the next soft start. Each LSB = 588 ms.

Reload EEPROM

R/W

1 = reload the contents of EEPROM.

0 = do not reload the contents of EEPROM.

Debounce time

R/W

1 = 2.56 μs.

0 = 660 μs.

Ignore VDD OV

R/W

1 = ignore the VDD 3.3 V overvoltage fault.

0 = do not ignore the VDD 3.3 V overvoltage fault.

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