DSPIC30F2011 datasheet(29/207 Pages) MICROCHIP

29 / 207 page

Preliminary

DS70139C-page 27

dsPIC30F2011/2012/3012/3013

3.0

MEMORY ORGANIZATION

3.1

Program Address Space

The program address space is 4M instruction words.

The program space memory map for the dsPI30F2011/

2012 is shown in Figure 3-1. The program space

memory map for the dsPI30F3012/3013 is shown in

Figure 3-2.

Program memory is addressable by a 24-bit value from

either the 23-bit PC, table instruction Effective Address

(EA), or data space EA, when program space is

mapped into data space as defined by Table 3-1. Note

that the program space address is incremented by two

between successive program words in order to provide

compatibility with data space addressing.

User program space access is restricted to the lower

4M instruction word address range (0x000000 to

0x7FFFFE) for all accesses other than TBLRD/TBLWT,

which use TBLPAG<7> to determine user or configura-

tion space access. In Table 3-1, Program Space

Address Construction, bit 23 allows access to the

Device ID, the User ID and the configuration bits.

Otherwise, bit 23 is always clear.

Note: This data sheet summarizes features of this group

of dsPIC30F devices and is not intended to be a complete

reference source. For more information on the CPU,

peripherals, register descriptions and general device

functionality, refer to the

dsPIC30F Family Reference

Manual (DS70046). For more information on the device

instruction set and programming, refer to the

dsPIC30F

Programmer’s Reference Manual (DS70030).

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