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STM32MP157C Folha de dados(PDF) 30 Page - STMicroelectronics |
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STM32MP157C Folha de dados(HTML) 30 Page - STMicroelectronics |
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30 / 260 page ![]() Functional overview STM32MP157C/F 30/260 DS12505 Rev 5 During power-up and power-down phases, the following power sequence requirements must be respected: • When VDD is below 1 V, other power supplies (VDDCORE, VDDA, VDDA1V8_REG, VDDA1V8_DSI, VDDA1V1_REG, VDD3V3_USBHS/FS, VDDQ_DDR) must remain below VDD + 300 mV. • When VDD is above 1 V, all power supplies are independent. During the power-down phase, VDD can temporarily become lower than other supplies only if the energy provided to the STM32MP157C/F device remains below 1 mJ; this allows external decoupling capacitors to be discharged with different time constants during the power- down transient phase. Figure 2. Power-up/down sequence 1. VDDX refers to any power supply among VDDCORE, VDDA, VDDA1V8_REG, VDDA1V8_DSI, VDDA1V1_REG, VDD3V3_USBHS/FS, VDDQ_DDR. MSv47490V1 0.3 1 VBOR0 3.6 Operating mode Power-on Power-down time V VDDX (1) VDD Invalid supply area VDDX < VDD + 300 mV VDDX independent from VDD |
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