STM32MP157F datasheet(41/260 Pages) STMICROELECTRONICS

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DS12505 Rev 5

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STM32MP157C/F

Functional overview

In order to optimize battery duration, this power domain is supplied by VDD when available

or by the voltage applied on VBAT pin (when VDD supply is not present). VBAT power is

switched when the PDR detects that VDD has dropped below the PDR level.

The voltage on the VBAT pin could be provided by an external battery, a supercapacitor or

directly by VDD. In the later case, VBAT mode is not functional.

VBAT operation is activated when VDD is not present.

The VBAT pin supplies the RTC, the backup registers, the retention RAM and the backup

SRAM.

Note:

None of these events: external interrupts, TAMP event, or RTC alarm/events are able to

directly restore the VDD supply and force the STM32MP157C/F device out of the VBAT

operation. Nevertheless, TAMP events and RTC alarm/events can be used to generate a

signal to an external circuitry (typically a PMIC) that can restore the STM32MP157C/F VDD

supply.

When PDR_ON pin is connected to VSS (internal reset OFF), the VBAT functionality is no

more available and VBAT pin must be connected to VDD.

3.26

Digital-to-analog converters (DAC1, DAC2)

The two 12-bit buffered DAC channels can be used to convert two digital signals into two

analog voltage signal outputs.

This dual digital interface supports the following features:

•

Two DAC converters: one for each output channel

•

8-bit or 12-bit monotonic output

•

Left or right data alignment in 12-bit mode

•

Synchronized update capability

•

Noise-wave generation

•

Triangular-wave generation

•

Sample and hold mode to reduce the power consumption

•

Dual DAC channel independent or simultaneous conversions

•

DMA capability for each channel including DMA underrun error detection

•

External triggers for conversion

•

input voltage reference VREF+ or internal VREFBUF reference.

The DAC channels are triggered through the timer update outputs that are also connected

to different DMA streams.

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