DS3154 datasheet(8/60 Pages) DALLAS

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DS3151/DS3152/DS3153/DS3154 Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs

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3. HARDWARE MODE AND CPU BUS MODE

The DS315x can operate in either hardware mode or CPU bus mode. In hardware mode, pulling configuration input

pins high or low does all configuration, and all status information is reported on status output pins. Internal registers

are not accessible in hardware mode. The device is configured for hardware mode when the HW pin is wired high

(HW = 1).

In CPU bus mode, most of the configuration and status pins used in hardware mode are reassigned to be address,

data, and control lines that provide a glueless interface to an 8-bit microprocessor bus. Through the CPU bus, an

external processor can access a set of internal registers. Setting configuration register bits high or low can do

configuration, and status information can be read from status register bits. Events indicated by status register bits

can also activate the interrupt output pin (INT), if configured to do so by a set of interrupt-enable bits. A few

configuration and status pins are active in hardware mode and CPU bus mode to support specialized applications,

such as protection switching. The device is configured for CPU bus mode when the HW pin is wired low (HW = 0).

With the exception of the HW pin, configuration and status pins available in hardware mode have corresponding

names and functions, with the exception that all register bits are active high. For example, LOS is indicated by the

receiver on the

RLOS pin (active low) in hardware mode and the RLOS register bit (active high) in CPU bus mode.

The few configuration input pins that are active in CPU bus mode also have corresponding register bits. In these

cases, the actual configuration is the logical OR of pin assertion and register bit assertion. For example, the

transmitter output driver is tri-stated if the

TTS pin is asserted (i.e., low) or the TTS register bit is asserted (high).

Figure 3-1 and Figure 3-2 show block diagrams of the DS315x in hardware mode and in CPU bus mode. Table 4-A

lists the pins that are active in each mode.

Figure 3-1. Hardware Mode Block Diagram

Analog

Local

Loopback

Automatic

Gain

Control

Adaptive

Equalizer

ALOS

Clock &

Data

Recovery

Clock

Invert

RXPn

RXNn

TXPn

TXNn

TTSn

PRBSn

TLBOn

TCINV

TPOSn/TDATn

TCLKn

TNEGn

E3Mn

RNEGn/RLCVn

RCLKn

RPOSn/RDATn

RLOSn

RMONn

Power

Supply

TDSAn,

TDSBn

B3ZS/

HDB3

Encoder

AIS, 100100…,

PRBS Pattern

Generation

PRBS

Detector

B3ZS/HDB3

Decoder

Digital LOS

Detector

squelch

Driver

Monitor

Loopback Control

TDMn

LLBn

VDD

VSS

TJAn

TBIN

RCINV

Remote

Loopback

Global

Configuration

STSn

Output

Drivers,

Clock

Invert

RTSn

RBIN

RJAn

HIZ

Digital

Local

Loopback

RLBn

RST

Clock Mux

T3MCLK E3MCLK STMCLK

Dallas

Semiconductor

DS315x

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