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MB90F548GPF Folha de dados(PDF) 19 Page - Cypress Semiconductor |
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MB90F548GPF Folha de dados(HTML) 19 Page - Cypress Semiconductor |
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19 / 70 page ![]() Document Number: 002- 07696 Rev. *A Page 19 of 70 MB90540G/545G Series (12) Indeterminate outputs from ports 0 and 1 (MB90V540G only) During oscillation setting time of step-down circuit (during a power-on reset) after the power is turned on, the outputs from ports 0 and 1 become following state. If RST pin is “H”, the outputs become indeterminate. If RST pin is “L”, the outputs become high-impedance. Pay attention to the port output timing shown as follow. Oscillation setting time*2 Power-on reset*1 Period of indeterminated VCC (Power-supply pin) PONR (power-on reset) signal RST (external asynchronous reset) signal RST (internal reset) signal Oscillation clock signal KA (internal operation clock A) signal KB (internal operation clock B) signal PORT (port output) signal *1 : Power-on reset time : “Period of clock frequency” 217 (Clock frequency of 16 MHz : 8.19 ms) *2 : Oscillation setting time : “Period of clock frequency” 218 (Clock frequency of 16 MHz : 16.38 ms) RST pin is “H” |
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