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BQ25708 Folha de dados(PDF) 21 Page - Texas Instruments |
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BQ25708 Folha de dados(HTML) 21 Page - Texas Instruments |
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21 / 77 page ![]() 21 bq25708 www.ti.com SLUSCU2 – NOVEMBER 2017 Product Folder Links: bq25708 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated 8.3 Feature Description 8.3.1 Power-Up from Battery Without DC Source If only battery is present and the voltage is above VVBAT_UVLOZ, the BATFET turns on and connects battery to system. By default, the charger is in low power mode (REG0x12[15] = 1) with lowest quiescent current. The LDO stays off. When device moves to performance mode (REG0x12[15] = 0), The host enables IBAT buffer through SMBus to monitor discharge current. For PSYS, PROCHOT or independent comparator, REGN LDO is enabled for an accurate reference. 8.3.2 Power-Up From DC Source When an input source plugs in, the charger checks the input source voltage to turn on LDO and all the bias circuits. It sets the input current limit before the converter starts. The power-up sequence from DC source is as follows: 1. 50 ms after VBUS above VVBUS_CONVEN, enable 6V LDO and CHRG_OK goes HIGH 2. Input voltage and current limit setup 3. Battery CELL configuration 4. 150 ms after VBUS above VVBUS_CONVEN, converter powers up. 8.3.2.1 CHRG_OK Indicator CHRG_OK is an active HIGH open drain indicator. It indicates the charger is in normal operation when the following conditions are valid: • VBUS is above VVBUS_CONVEN • VBUS is below VACOV • No MOSFET/inductor fault 8.3.2.2 Input Voltage and Current Limit Setup When CHRG_OK goes LOW, the charger sets default input current limit in REG0x3F() to 3.30A. The actual input current limit is the lower setting of REG0x3F() and ILIM_HIZ pin. Charger initiates a VBUS voltage measurement without any load (VBUS at no load condition). The default VINDPM threshold is VBUS@noLoad-1.28 V. After input current and voltage limits are set, the charger device is ready to power up. The host can always update input current and voltage limit based on input source type. 8.3.2.3 Battery Cell Configuration CELL_BATPRESZ pin is biased with resistors from REGN to CELL_BATPRESZ to GND. After VDDA LDO is activated, the device detects the battery configuration through CELL_BATPRESZ pin bias voltage. Refer to Electrical Characteristics for CELL setting thresholds. Table 1. Battery Cell Configuration CELL COUNT PIN VOLTAGE w.r.t. VDDA BATTERY VOLTAGE (REG0x15) SYSOVP 4S 75% 16.800V 19.5V 3S 55% 12.592V 19.5V 2S 40% 8.400V 12V 1S 25% 4.192V 5V 8.3.2.4 Device Hi-Z State The charger enters Hi-Z mode when ILIM_HIZ pin voltage is below 0.4 V or REG0x32[15] is set to 1. During Hi-Z mode, the input source is present, and the charger is in the low quiescent current mode with REGN LDO enabled. |
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