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Os motores de busca de Datasheet de Componentes eletrônicos |
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Os motores de busca de Datasheet de Componentes eletrônicos |
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AD6673 Folha de dados(PDF) 8 Page - Analog Devices |
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AD6673 Folha de dados(HTML) 8 Page - Analog Devices |
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8 / 46 page  Data Sheet AD6673 Rev. C | Page 7 of 45 Parameter1 Temperature Min Typ Max Unit SPURIOUS-FREE DYNAMIC RANGE (SFDR) f IN = 30 MHz 25°C 90 dBc f IN = 90 MHz 25°C 87 dBc f IN = 140 MHz 25°C 86 dBc f IN = 185 MHz 25°C 88 dBc Full 80 dBc f IN = 220 MHz 25°C 86 dBc WORST OTHER (HARMONIC OR SPUR) f IN = 30 MHz 25°C −96 dBc f IN = 90 MHz 25°C −94 dBc f IN = 140 MHz 25°C −94 dBc f IN = 185 MHz 25°C −94 dBc Full −80 dBc f IN = 220 MHz 25°C −91 dBc TWO-TONE SFDR f IN = 184.12 MHz (−7 dBFS), 187.12 MHz (−7 dBFS) 25°C 88 dBc CROSSTALK2 Full 95 dB FULL POWER BANDWIDTH3 25°C 1000 MHz 1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions. 2 Crosstalk is measured at 100 MHz with −1.0 dBFS on one channel and no input on the alternate channel. 3 Full power bandwidth is the bandwidth of operation determined by where the spectral power of the fundamental frequency is reduced by 3 dB. DIGITAL SPECIFICATIONS AVDD = 1.8 V, DRVDD = 1.8 V, DVDD = 1.8 V, maximum sample rate for speed grade, VIN = −1.0 dBFS differential input, 1.75 V p-p full-scale input range, DCS enabled, link parameters used are M = 2 and L = 2, unless otherwise noted. Table 3. Parameter Temperature Min Typ Max Unit DIFFERENTIAL CLOCK INPUTS (CLK+, CLK−) Input CLK± Clock Rate Full 40 625 MHz Logic Compliance CMOS/LVDS/LVPECL Internal Common-Mode Bias Full 0.9 V Differential Input Voltage Full 0.3 3.6 V p-p Input Voltage Range Full AGND AVDD V Input Common-Mode Range Full 0.9 1.4 V High Level Input Current Full 0 +60 µA Low Level Input Current Full −60 0 µA Input Capacitance Full 4 pF Input Resistance Full 8 10 12 kΩ RF CLOCK INPUT (RFCLK) Input CLK± Clock Rate Full 650 1500 MHz Logic Compliance CMOS/LVDS/LVPECL Internal Bias Full 0.9 V Input Voltage Range Full AGND AVDD V Input Voltage Level High Full 1.2 AVDD V Low Full AGND 0.6 V High Level Input Current Full 0 +150 µA Low Level Input Current Full −150 0 µA Input Capacitance Full 1 pF Input Resistance (AC-Coupled) Full 8 10 12 kΩ |
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