AD6652BBC datasheet(27/76 Pages) AD

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AD6652

Rev. 0 | Page 27 of 76

External Reference Operation

An external reference voltage can be used to enhance the gain

accuracy of the ADC or improve thermal drift characteristics.

When multiple ADCs track one another, a single reference

(internal or external) might be necessary to reduce gain-

matching errors to an acceptable level. A high-precision

external reference can also be selected to provide lower gain and

offset temperature drift.

When the SENSE pin is tied to AVDD as in Figure 42, the

internal reference is disabled, allowing the use of an external

reference. An internal reference buffer loads the external

reference with an equivalent 7 kΩ load. The internal buffer still

generates the positive and negative full-scale references, REFT

and REFB, for the ADC core. The input span is always twice the

value of the reference voltage; therefore, the external reference

must be limited to a maximum of 1 V.

If the internal reference of the AD6652

s, the loading on VREF by the other converters must be

onsidered. Figure 44 shows how the internal reference voltage

is affected by loading.

0.2

0.4

0.6

0.8

1.0

1.2

–40 –30 –20 –10

TEMPERATURE (°C)

VREF = 1V

VREF = 0.5V

Figure 43. Typical VREF Drift

–0.25

–0.20

–0.15

is used to drive multiple

VINA+

VINA–

VREF

0.5V TO 1.0V

EXTERNAL

REFERENCE IN

VREF

SENSE

+3.0V

TO CH B

REF AMP

SELECT

LOGIC

REF

AMP A

CH A

ADC

CORE

REFT_A

REFB_A

0.5V

0.1

µF

0.1

µF

0.1

µF

0.1

µF

RINT

Figure 42. External Reference Operation with Connections

Shown for Channel A Only

–0.10

–0.05

0.05

1.0

1.5

0.5

2.0

2.5

3.0

LOAD (mA)

1V ERROR

0.5V ERROR

Figure 44. VREF Accuracy vs. Load

Shared Reference Mode

The shared reference mode allows the user to connect the

references from the dual ADCs together for superior gain and

offset matching performance. If the ADCs are to function

independently, the reference decoupling should be treated

independently and can provide superior isolation between the

dual ADC channels. To enable shared reference mode, the

SHRDREF pin must be tied high and the differential references

must be externally shorted together, that is, REFTA must be

shorted externally to REFTB and REFBA must be shorted

externally to REFBB.

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