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M-CAS-R80515 Folha de dados(PDF) 2 Page - List of Unclassifed Manufacturers

Nome de Peças M-CAS-R80515
Descrição Electrónicos  8-bit Microcontroller
PDF  5 Pages
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Fabricante Electrônico  ETC [List of Unclassifed Manufacturers]
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M-CAS-R80515 Folha de dados(HTML) 2 Page - List of Unclassifed Manufacturers

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R80515 Megafunction Datasheet
Applications
•
•
•
•
Pin Description
Name
Type
Polarity/
Bus Size
Description
port0i
port0o
In
Out
8
8
Port 0
8-bit bi-directional I/O
port with separated
inputs and outputs
port1i
port1o
In
Out
8
8
Port 1
8-bit bi-directional I/O
port with separated
inputs and outputs
port2i
port2o
In
Out
8
8
Port 2
8-bit bi-directional I/O
port with separated
inputs and outputs
port3i
port3o
In
Out
8
8
Port 3
8-bit bi-directional I/O
port with separated
inputs and outputs
clk
In
Rising
Clock
A pulse for internal
clock counters and all
synchronous circuits
reset
In
High
Hardware reset
Resets the device
when this pin is held
high for two clock
cycles while the
oscillator is running
clkcpu
In
Rising
Engine clock
A pulse for internal
circuits that are
stopped when the
R80515 is in the IDLE
or STOP mode
clkcpuo
Out
Rising
Engine clock output
Is the gated clk clock.
clkcpuo stays low
when the R80515
enters into IDLE or
STOP mode. The
clkcpuo is dedicated
to off-core connection
to the clkcpu input
clkper
In
Rising
Peripheral clock
A pulse for internal
circuits that are
stopped when the
R80515 is in STOP
mode
clkperoo
Out
Out
Rising
Rising
Peripheral clock
output is the gated
clk clock. clkpero stays
low when the R80515
enters into STOP
mode. The clkpero is
dedicated to off-core
connection to the
clkper input
Peripheral clock
output is the gated
clk clock. clkpero stays
low when the R80515
enters into STOP
mode. The clkpero is
dedicated to off-core
connection to the
clkper input
Embedded microcontroller systems
Data computation and transfer
Communication systems
Professional audio and video
Symbol
R80515
ramdatai
port0i
port1i
port2i
port3i
port0o
port1o
port2o
port3o
memdatai
rxd0i
rxd0o
txd0
rxd1i
reset
clk
t0
t1
t2
t2ex
cc0
cc1
cc2
cc3
sfrdatai
sfrdatao
sfraddr
sfrwe
sfroe
swd
int0
int1
int2
int3
int4
int6
int5
txd1
ramdatao
ramaddr
ramwe
ramoe
memdatao
memaddr
mempswr
mempsrd
memwr
memrd
clkcpu
clkcpuo
clkper
clkpero
CAST, Inc.
Page 2



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