MCP6541 datasheet(11/28 Pages) MICROCHIP

11 / 28 page

 2003 Microchip Technology Inc.

DS21696C-page 11

MCP6541/2/3/4

3.0

APPLICATIONS INFORMATION

The MCP6541/2/3/4 family of push-pull output compar-

ators are fabricated on Microchip’s state-of-the-art

CMOS process. They are suitable for a wide range of

applications requiring very low power consumption.

3.1

Comparator Inputs

The MCP6541/2/3/4 comparator family uses CMOS

transistors at the input. They are designed to prevent

phase inversion when the input pins exceed the supply

voltages. Figure 2-31

shows an input voltage

exceeding both supplies with no resulting phase

inversion.

The input stage of this family of devices uses two

differential input stages in parallel: one operates at low

input voltages and the other at high input voltages. With

this topology, the input voltage is 0.3V above VDD and

0.3V below VSS. Therefore, the input offset voltage is

measured at both VSS - 0.3V and VDD + 0.3V to ensure

proper operation.

The maximum operating input voltages that can be

applied are VSS - 0.3V and VDD + 0.3V. Voltages on the

inputs that exceed this absolute maximum rating can

cause excessive current to flow and permanently

damage the device. In applications where the input pin

exceeds the specified range, external resistors can be

used to limit the current below ±2 mA, as shown in

Figure 3-1.

FIGURE 3-1:

An input resistor (RIN)

should be used to limit excessive input current if

either of the inputs exceeds the Absolute

Maximum specification.

3.2

Push-Pull Output

The push-pull output is designed to be compatible with

CMOS and TTL logic, while the output transistors are

configured to give rail-to-rail output performance. They

are driven with circuitry that minimizes any switching

current (shoot-through current from supply-to-supply)

when the output is transitioned from high-to-low, or from

low-to-high (see Figures 2-15, 2-17, 2-32 through 2-36

for more information).

3.3

MCP6543 Chip Select (CS)

The MCP6543 is a single comparator with chip select

(CS). When CS is pulled high, the total current

consumption drops to 20 pA (typ); 1 pA (typ) flows

through the CS pin, 1 pA (typ) flows through the output

pin and 18 pA (typ) flows through the VDD pin, as

shown in Figure 1-1. When this happens, the

comparator output is put into a high-impedance state.

By pulling CS low, the comparator is enabled. If the CS

pin is left floating, the comparator will not operate

properly. Figure 1-1 shows the output voltage and

supply current response to a CS pulse.

The internal CS circuitry is designed to minimize

glitches when cycling the CS pin. This helps conserve

power, which is especially important in battery-

powered applications.

3.4

Externally-Set Hysteresis

Greater flexibility in selecting hysteresis (or input trip

points) is achieved by using external resistors.

Input offset voltage (VOS) is the center (average) of the

(input-referred) low-high and high-low trip points. Input

hysteresis voltage (VHYST) is the difference between

the same trip points. Hysteresis reduces output

chattering when one input is slowly moving past the

other and thus reduces dynamic supply current. It also

helps in systems where it is best not to cycle between

states too frequently (e.g., air conditioner thermostatic

control). The MCP6541/2/3/4 family has internally-set

hysteresis that is small enough to maintain input offset

accuracy (<7 mV) and large enough to eliminate output

chattering caused by the comparator’s own input noise

voltage (200 µVp-p).

FIGURE 3-2:

The MCP6541/2/3/4

comparators’ internal hysteresis eliminates

output chatter caused by input noise voltage.

RIN

VSS Minimum expected VIN

()

–

2 mA

------------------------------------------------------------------------------

≥

RIN

Maximum expected VIN

() VDD

–

2 mA

----------------------------------------------------------------------------------

≥

VIN

RIN

VOUT

MCP654X

Time (100 ms/div)

VOUT

VIN–

Hysteresis

VDD = 5.0V

VIN+ = +2.75V

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