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AS4C4M16S Folha de dados(PDF) 2 Page - Alliance Semiconductor Corporation |
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AS4C4M16S Folha de dados(HTML) 2 Page - Alliance Semiconductor Corporation |
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2 / 53 page ![]() AS4C4M16S - 6/7 tCK3 Clock Cycle time(min.) 6/7ns tAC3 Access time from CLK(max.) 5.4/5.4ns tRAS Row Active time(min.) 42/49 ns tRC Row Cycle time(min.) 60/63 ns Part Number Frequency Package AS4C4M16S-6TCN 166MHz TSOP II AS4C4M16S-6TIN 166MHz TSOP II AS4C4M16S-7TCN 143MHz TSOP II FEBRUARY 2011 AS4C4M16S 64Mb / 4M x 16 bit Synchronous DRAM (SDRAM) Alliance Memory Rev2.0 May 2014 Features • Fast access time from clock: 5.4/5.4 ns • Fast clock rate: 166/143 MHz • Fully synchronous operation • Internal pipelined architecture • 1M word x 16-bit x 4-bank • Programmable Mode registers - CAS Latency: 2, or 3 - Burst Length: 1, 2, 4, 8, or full page - Burst Type: interleaved or linear burst - Burst stop function • Auto Refresh and Self Refresh • 4096 refresh cycles/64ms • CKE power down mode • Single +3.3V ± 0.3V power supply • Interface: LVTTL • 54-pin 400 mil plastic TSOP II package - Pb free and Halogen free Table1. Key Specifications Table 2. Ordering Information T: indicates TSOPII Package, N: indicates Pb and Halogen Free for TSOPII Package Figure 1.Pin Assignment (Top View) Overview The AS4C4M16S SDRAM is a high-speed CMOS synchronous DRAM containing 64 Mbits. It is internally configured as 4 Banks of 1M word x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Read and write accesses to the SDRAM are burst oriented; accesses st art at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command which is then followed by a Read or Write command. The AS4C4M16S provides for programmable Read or Write burst lengths of 1, 2, 4, 8, or full page, with a burst termination option. An auto precharge function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst sequence. The refresh functions, either Auto or Self Refresh are easy to use. By having a programmable mode register, the system can choose the most suitable modes to maximize its performance. These devices are well suited for applications requiring high memory bandwidth and particularly well suited to high performance PC applications. VDD DQ0 VDDQ DQ1 DQ2 VSSQ DQ3 DQ4 VDDQ DQ5 DQ6 VSSQ DQ7 VDD LDQM WE# CAS# RAS# CS# BA0 BA1 A10/AP A0 A1 A2 A3 VDD 1 54 2 53 3 52 4 51 5 50 6 49 7 48 8 47 9 46 10 45 11 44 12 43 13 42 14 41 15 40 16 39 17 38 18 37 19 36 20 35 21 34 22 33 23 32 24 31 25 30 26 29 27 28 VSS DQ15 VSSQ DQ14 DQ13 VDDQ DQ12 DQ11 VSSQ DQ10 DQ9 VDDQ DQ8 VSS NC/RFU UDQM CLK CKE NC A11 A9 A8 A7 A6 A5 A4 VSS * Operating temperature range - Commercial (0 ~ 70°C) - Industrial (-40 ~ 85°C) . 1 Rev2.0 May 2014 |
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