STLED524 datasheet(21/72 Pages) STMICROELECTRONICS

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STLED524

Detailed description

4.5

Description of registers

4.5.1

Software control register

When CLR1 is set to 1, pattern 1 is cleared, (dimming, slope and delay of all dots are set to

0) then it is set to 0 automatically.

When CLR2 is set to 1, pattern 2 is cleared, (dimming, slope and delay of all dots are set to

0) then it is set to 0 automatically.

If SWRST bit is set to 1, content of all registers is set to default values and SWRST bit is

cleared automatically.

If EN = 0, display is off

If EN = 1, display is on

4.5.2

Display control register

DISP1 and DISP2 bits define which pattern is displayed, see Table 18.

DISP bits can be written by SPI anytime, but the display change (from pattern 1 to pattern 2

or vice versa) is performed according to the following rules:

•

On next frame, if the display is on and scroll features are disabled (EN=1, SCRLEN=0).

•

If SCRLEN=1 and EN=1, scroll operation starts according to the scroll setup.

Table 16. Software control register

Software control

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Add = 00h

SWRST

CLR2

CLR1

Default

000

0000

Table 17. Display control register

Display control

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Add = 01h

----

DISP2

DISP1

Default

000

0000

Table 18. DISP bits

DISP2

DISP1

Displayed pattern

No pattern is displayed (blank screen)

Pattern 1 is displayed

Pattern 2 is displayed

No pattern is displayed (blank screen)

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