LP2995M datasheet(1/13 Pages) NSC

Nome de Peças	LP2995M

Descrição Electrónicos	DDR Termination Regulator

PDF	13 Pages

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Fabricante Electrônico	NSC [National Semiconductor (TI)]

Página de início	http://www.national.com

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LP2995

DDR Termination Regulator

General Description

The LP2995 linear regulator is designed to meet the JEDEC

SSTL-2 and SSTL-3 specifications for termination of DDR-

SDRAM. The device contains a high-speed operational am-

plifier to provide excellent response to load transients. The

output stage prevents shoot through while delivering 1.5A

continuous current and transient peaks up to 3A in the

application as required for DDR-SDRAM termination. The

LP2995 also incorporates a V

SENSE pin to provide superior

load regulation and a V

REF output as a reference for the

chipset and DDR DIMMS.

Patents Pending

Features

n

Low output voltage offset

n

Works with +5v, +3.3v and 2.5v rails

n

Source and sink current

n

Low external component count

n

No external resistors required

n

Linear topology

n

Available in SO-8, PSOP-8 or LLP-16 packages

n

Low cost and easy to use

Applications

n

DDR Termination Voltage

n

SSTL-2

n

SSTL-3

Typical Application Circuit

20039302

July 2003

DS200393

www.national.com

Nº de peça semelhante - LP2995M

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Unisonic Technologies	UR5595	312Kb / 12P	DDR TERMINATION REGULATOR
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