ADA4177-2ARMZ-R7 datasheet(26/31 Pages) AD

26 / 31 page

ADA4177-1/ADA4177-2/ADA4177-4

Data Sheet

J1A, J1B, J2A, and J2B are depletion mode junction field effect

transistors (JFETs) that replace the series resistance in the

conventional protection scheme. Under normal operation, the

input bias current of the ADA4177-1/ADA4177-2/ADA4177-4

flows through the J1A and J2A transistors without pinching off

the channel. To achieve excellent noise performance, J1A and

J2A must have a low on resistance (RDSON) of approximately

300 Ω.

When either input exceeds the rail by more than a diode, large

currents flow through either J1A or J2A, which causes the

channels to pinch off and effectively raises their resistance.

Figure 88 shows the positive overvoltage and negative

overvoltage characteristics as the FET channel pinches.

Figure 88. Input Bias Current During Positive and Negative Overvoltage,

VSY = ±15 V, Voltage Follower Configuration

Figure 89 shows how the JFET effective resistance increases

exponentially as shown by the measurements at 2 V, 20 V,

and 40 V overvoltage. Note that as the overvoltage increases

from 2 V to 40 V, the resistance increases from 300 Ω to 3.5 kΩ

(a factor of 11).

Figure 89. Overvoltage vs. Input Voltage (VIN), Voltage Follower

Configuration

LIMITING OVERVOLTAGE CURRENT OUT OF THE

POSITIVE SUPPLY PIN

Because the positive power supply of the system may be incapable

of sinking the large overvoltage current of 8 mA (see Figure 88),

care was taken to divide down this current into the positive rail

during an overvoltage event. As shown in Figure 90, Q1L is a

lateral PNP transistor that serves two purposes. First, the

emitter base acts as a clamping diode to route the overvoltage

current away from the V+ pin and to the V− pin. Second, it

divides down this current via the beta of Q1L. At an emitter

current of 8 mA, the beta of Q1L is approximately 8, which

reduces the current injected into the positive supply by a factor

of 8.

Figure 90. Overvoltage Protection Circuitry

Figure 91 shows the positive and negative supply currents when

the input voltage exceeds the supply voltages (and overvoltage

condition). The current at the V+ terminal does not reverse

direction during an overvoltage event because the current is

directed to V− via the collector of Q1L.

Figure 91. Supply Current vs. Input Differential, Circuit Configured at

Unity Gain with V+ = +15 V and V− = −15 V

If negative overvoltage transients are expected, ensure that the

negative voltage source driving V− can handle sourcing current

without forcing current into the device and causing the supply

voltage to change.

–10

–8

–6

–4

–2

VIN (V)

–50

–10

–30

VSY = ±15V

–2

VIN (V)

2.5

42.5

32.5

37.5

27.5

22.5

17.5

12.5

7.5

300Ω AT 2V

2.2kΩ

AT 20V

3.5kΩ AT 40V

J1B

J1A

+IN

V+

Q1L

V–

–12

–10

–8

–6

–4

–2

INPUT DIFFERENTIAL (V)

–40

–10

–20

–30

POSITIVE SUPPLY CURRENT

NEGATIVE SUPPLY CURRENT

Rev. C | Page 26 of 31

ADA4177-2ARMZ-R7 Folha de dados(PDF) 26 Page - Analog Devices

ADA4177-2ARMZ-R7 Folha de dados(HTML) 26 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

Folha de dados Download

Ligação URL