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P87C51RB2BBD Folha de dados(PDF) 56 Page - NXP Semiconductors

Nome de Peças P87C51RB2BBD
Descrição Electrónicos  80C51 Central Processing Unit
PDF  67 Pages
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Fabricante Electrônico  PHILIPS [NXP Semiconductors]
Página de início  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

P87C51RB2BBD Folha de dados(HTML) 56 Page - NXP Semiconductors

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Philips Semiconductors
Product data
P87C51RA2/RB2/RC2/RD2
80C51 8-bit microcontroller family 8KB/16KB/32KB/64KB OTP
with 512B/1KB RAM, low voltage (2.7 to 5.5 V), low power, high
speed (30/33 MHz)
2003 Jan 24
56
Table 8.
EPROM Programming Modes
MODE
RST
PSEN
ALE/PROG
EA/VPP
P2.7
P2.6
P3.7
P3.6
P3.3
Read signature
1
0
1
1
0
0
0
0
X
Program code data
1
0
0*
VPP
1
0
1
1
X
Verify code data
1
0
1
1
0
0
1
1
X
Pgm encryption table
1
0
0*
VPP
1
0
1
0
X
Pgm security bit 1
1
0
0*
VPP
1
1
1
1
X
Pgm security bit 2
1
0
0*
VPP
1
1
0
0
X
Pgm security bit 3
1
0
0*
VPP
0
1
0
1
X
Program to 6-clock mode
1
0
0*
VPP
0
0
1
0
0
Verify 6-clock4
1
0
1
1
e
0
0
1
1
Verify security bits5
1
0
1
1
e
0
1
0
X
NOTES:
1. ‘0’ = Valid low for that pin, ‘1’ = valid high for that pin.
2. VPP = 12.75 V ±0.25 V.
3. VCC = 5 V±10% during programming and verification.
4. Bit is output on P0.4 (1 = 12x, 0 = 6x).
5. Security bit one is output on P0.7.
Security bit two is output on P0.6.
Security bit three is output on P0.3.
*
ALE/PROG receives 5 programming pulses for code data (also for user array; 5 pulses for encryption or security bits) while VPP is held at
12.75 V. Each programming pulse is low for 100
µs (±10 µs) and high for a minimum of 10 µs.
Table 9.
Program Security Bits for EPROM Devices
PROGRAM LOCK BITS1, 2
SB1
SB2
SB3
PROTECTION DESCRIPTION
1
U
U
U
No Program Security features enabled. (Code verify will still be encrypted by the Encryption Array if
programmed.)
2
P
U
U
MOVC instructions executed from external program memory are disabled from fetching code bytes
from internal memory, EA is sampled and latched on Reset, and further programming of the EPROM
is disabled.
3
P
P
U
Same as 2, also verify is disabled.
4
P
P
P
Same as 3, external execution is disabled. Internal data RAM is not accessible.
NOTES:
1. P – programmed. U – unprogrammed.
2. Any other combination of the security bits is not defined.



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