ST6280B datasheet(59/78 Pages) STMICROELECTRONICS

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ST62T80B/E80B

LCD CONTROLLER-DRIVER (Cont”d)

Address Mapping of the Display Segments

The LCD RAM is located in the ST6280B data

space in two pages of 64 bytes from addresses

00h to 3Fh. The LCD forms a matrix of 56 segment

lines (columns) and 8 backplane lines (rows) or 48

segment lines and 11 or 16 backplane lines ac-

cording to the chosen operating mode. Each bit of

the LCD RAM is mapped to one dot of the LCD

matrix, as described in Figure 32. If a bit is set, the

corresponding LCD dot is switched on; if it is reset,

the dos is switched off.

If 1/8 duty cycle mode is selected (56 x 8 dot ma-

trix), only RAM page 1 is used for display data

storage. In this case page 2 is completely free for

common data storage.

If 1/16 duty cycle mode is selected (48 x 16 dot

matrix), RAM page 1 and 2 are used for display

data storage. In this case addresses 00 to 07 in

both pages are free for common data storage.

If 1/11 duty cycle mode is selected (48 x 11 dot

matrix), RAM pages 1 and 2 are used for display

data storage. In this case addresses 00 to 07 in

both pages and bits 3 to 7 in RAM page 2 are free

for common data storage.

In all display modes 16 bytes from address 38h to

3Fh in RAM pages 1 and 2 are free common data

storage.

After reset, the LCD RAM is not initialized and con-

tains arbitrary information. As the LCD control reg-

ister is reset, the LCD is completely switched off.

Figure 33. Addressing Mapping of the LCD RAM

1/11 MUX (48 x 11 = 528 dots

LCD-RAM Address

COM1

bit0

Page 1

COM2

bit1

COM3

bit2

COM4

bit3

COM5

bit4

COM6

bit5

COM7

bit6

COM8

bit7

COM9

bit0

Page 2

COM10

bit1

COM11

bit2

COM12

bit3

5bitx48

free data

storage

COM13

bit4

COM14

bit5

COM15

bit6

COM16

bit7

16 bytes free for

data storage

16 bytes free for

data storage

1105

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