GXM datasheet(96/244 Pages) NSC

Nome de Peças	GXM

Descrição Electrónicos	Geode??GXm Processor Integrated x86 Solution with MMX Support

PDF	244 Pages

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Fabricante Electrônico	NSC [National Semiconductor (TI)]

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Revision 3.1

Integrated Functions (Continued)

Table 4-4. L1 Cache BitBLT Registers

Bit

Name

Description

L1_BB0_BASE Register (R/W)

Default Value = None

15:12

RSVD

Reserved: Set to 0.

11:4

INDEX

BitBLT 0 Base Index: Theindex to thestarting lineof BLT Buffer 0.

3:0

BYTE

BitBLT 0 Starting Byte: Determines which byte of the starting line is the beginning of BLT Buffer 0.

L1_BB0_POINTER Register (R/W)

Default Value = None

15:12

RSVD

Reserved: Set to 0.

11:4

INDEX

BitBLT 0 Pointer Index: The index to the current line of BLT Buffer 0.

3:0

RSVD

Reserved: Set to 0.

L1_BB1_Base Register (R/W)

Default Value = None

15:12

RSVD

Reserved: Set to 0.

11:4

INDEX

BitBLT 1 Base Index: Theindex to thestarting lineof BLT Buffer 1.

3:0

BYTE

BitBLT 1 Starting Byte: Determines which byte of the starting line is the beginning of BLT Buffer 1.

L1_BB1_POINTER Register (R/W)

Default Value = None

15:12

RSVD

Reserved: Set to 0.

11:4

INDEX

BitBLT 1 Pointer Index: The index to the current line of BLT Buffer 1.

3:0

RSVD

Reserved: Set to 0.

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