UCD3138128APFCR datasheet(8/83 Pages) TI1

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UCD3138128A

SLUSC99 – JULY 2016

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Pin Functions (continued)

NAME

PRIMARY ASSIGNMENT

ALTERNATE ASSIGNMENT

CONFIGURABLE

AS A GPIO?

NO. 1

NO. 2

(1)

Fusion Digital Power based debug tools are recommended instead of JTAG.

DGND

Digital ground

RESET

Device Reset Input, active low

PWM2

General purpose PWM 2

Yes

PWM3

General purpose PWM 3

Yes

TCAP1

Timer Capture Input

TCAP0

Yes

ADC_EXT_TRIG

ADC conversion external trigger input

Yes

PMBUS_CLK

PMBUS Clock (Open Drain)

Yes

PMBUS_DATA

PMBus data (Open Drain)

Yes

PMBUS_ALERT

PMBus Alert (Open Drain)

Yes

PMBUS_CTRL

PMBus Control (Open Drain)

Yes

I2C_CLK

I2C Clock

Yes

I2C_DATA

I2C Data

Yes

DGND

Digital ground

DPWM0A

DPWM 0A output

Yes

DPWM0B

DPWM 0B output

Yes

DPWM1A

DPWM 1A output

Yes

DPWM1B

DPWM 1B output

Yes

DPWM2A

DPWM 2A output

Yes

DPWM2B

DPWM 2B output

Yes

DPWM3A

DPWM 3A output

Yes

DPWM3B

DPWM 3B output

Yes

DTC0

Synchronous Rectifier dead time optimization control input 0

GPIOA

Yes

DTC1

Synchronous Rectifier dead time optimization control input 1

GPIOB

Yes

GPIOC

General purpose IO C

Yes

GPIOD

General purpose IO D

Yes

SYNC

DPWM Synchronize pin

Yes

SCI_TX0

SCI TX 0

Yes

SCI_RX0

SCI RX 0

Yes

SCI_TX1

SCI TX 1

Yes

SCI_RX1

SCI RX 1

Yes

PWM0

General purpose PWM 0

SYNC

Yes

PWM1

General purpose PWM 1

Yes

DGND

Digital ground

EXT_INT

External Interrupt

Yes

FAULT0

External fault input 0

Yes

FAULT1

External fault input 1

Yes

TCK

(1)

JTAG test clock. It is recommended that this pin is pulled LOW

on the target.

RTC_IN

XTAL_CLK_OUT

Yes

TDO

(1)

JTAG test data output. It is recommended that this pin is pulled

HIGH on the target.

TCAP0

TCAP1

Yes

TDI

(1)

JTAG test data input. It is recommended that this pin is pulled

HIGH on the target.

TCAP0

TCAP1

Yes

TMS

(1)

JTAG test mode select. This pin must be pulled HIGH on the

target so that the effect of any spurious TCKs when there is no

connection is benign.

Yes

TCAP0

Timer Capture Input

TCAP1

Yes

SPI_CS

SPI Chip Select

Yes

SPI_CLK

SPI Clock

Yes

SPI_MOSI

SPI Master Output Slave Input

Yes

SPI_MISO

SPI Master Input Slave Output

Yes

FAULT2

External fault input 2

Yes

FAULT3

External fault input 3

Yes

DGND

Digital ground

V33DIO

Digital I/O 3.3-V core supply

BP18

1.8V Bypass (For internal use only, do not load)

V33D

Digital 3.3-V core supply

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