LAN9500AI datasheet(154/213 Pages) MICROCHIP

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LAN950x

DS00001875A-page 154

 2010 - 2015 Microchip Technology Inc.

7.3.28

FS DESCRIPTOR ATTRIBUTES REGISTER (FS_ATTR)

This register is supported only by LAN9500A/LAN9500Ai.

This register sets the length values for FS descriptors that have been loaded into Descriptor RAM via the Data Port reg-

isters. The FS Polling interval is also defined by a field within this register. The Descriptor RAM images may be used,

in conjunction with this register, to facilitate customized operation when no EEPROM is present.

Note 1: If a descriptor does not exist in Descriptor RAM, its size value must be written as 00h.

2: This register only affects system operation when an EEPROM is not present and the EEPROM Emulation

Enable (EEM) bit indicates Descriptor RAM and the Attributes Registers are to be used for descriptor pro-

cessing.

3: Writing to this register when an EEPROM is present is prohibited and will result in untoward operation and

unexpected results.

4: This register is protected by Reset Protection (RST_PROTECT).

Note 7-19

The only legal values are 0 and 0x12h. Writing any other values will result in untoward behavior and

unexpected results.

Note 7-20

The only legal values are 0 and 0x12h. Writing any other values will result in untoward behavior and

unexpected results.

Address:

0A4h

Size:

32 bits

Bits

Description

Type

Default

31:24

RESERVED

23:16

FS Polling Interval (FS_POLL_INT)

R/W

01h

15:8

FS Device Descriptor Size (FS_DEV_DESC_SIZE) Note 7-19

R/W

00h

7:0

FS Configuration Descriptor Size (FS_CFG_DESC_SIZE) Note 7-20

R/W

00h

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