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Os motores de busca de Datasheet de Componentes eletrônicos |
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Os motores de busca de Datasheet de Componentes eletrônicos |
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LAN9500AI Folha de dados(PDF) 87 Page - Microchip Technology |
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LAN9500AI Folha de dados(HTML) 87 Page - Microchip Technology |
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87 / 213 page  2010 - 2015 Microchip Technology Inc. DS00001875A-page 87 LAN950x Table 5-61, "Required EECLK Cycles", shown below, shows the number of EECLK cycles required for each EEPROM operation. 5.7.4.2 Host Initiated EEPROM Reload The Host can initiate a reload of the EEPROM by issuing the RELOAD command via the E2P Command (E2P_CMD) register. If the first byte read from the EEPROM is not 0xA5, it is assumed that the EEPROM is not present, or not pro- grammed, and the reload will fail. The Data Loaded bit of the E2P_CMD register indicates a successful reload of the EEPROM. 5.7.4.3 EEPROM Command and Data Registers Refer to Section 7.3.12, "EEPROM Command Register (E2P_CMD)," on page 136 and Section 7.3.13, "EEPROM Data Register (E2P_DATA)," on page 139 for a detailed description of these registers. Supported EEPROM operations are described in these sections. 5.7.4.4 EEPROM Timing Refer to Section 8.5.4, "EEPROM Timing," on page 198 for detailed EEPROM timing specifications. FIGURE 5-27: EEPROM WRAL CYCLE TABLE 5-61: REQUIRED EECLK CYCLES Operation Required EECLK Cycles ERASE 10 ERAL 10 EWDS 10 EWEN 10 READ 18 WRITE 18 WRAL 18 Note: It is not recommended that the RELOAD command be used as part of normal operation, as race conditions can occur with USB Commands that access descriptor data. It is best for the Host to issue a SRST to reload the EEPROM data. 0 EECLK EEDIO (INPUT) EEDIO (OUTPUT) EECS 1 D7 D0 0 01 tCSL |
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