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PIC16C641 Folha de dados(PDF) 24 Page - Microchip Technology |
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PIC16C641 Folha de dados(HTML) 24 Page - Microchip Technology |
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24 / 136 page ![]() PIC16C64X & PIC16C66X DS30559A-page 24 Preliminary © 1996 Microchip Technology Inc. 4.2.2.4 PIE1 REGISTER This register contains the individual enable bits for the comparator and Parallel Slave Port interrupts. FIGURE 4-8: PIE1 REGISTER (ADDRESS 8Ch) R/W-0 R/W-0 U-0 U-0 U-0 U-0 U-0 U-0 PSPIE(1) CMIE — — — — — — R= Readable bit W= Writable bit U= Unimplemented bit, read as ‘0’ - n= Value at POR reset bit7 bit0 bit 7: PSPIE(1): Parallel Slave Port Read/Write Interrupt Enable bit 1 = Enables the PSP read/write interrupt 0 = Disables the PSP read/write interrupt bit 6: CMIE: Comparator Interrupt Enable bit 1 = Enables the Comparator interrupt 0 = Disables the Comparator interrupt bit 5-0: Unimplemented: Read as '0' Note 1: Bit PSPIE is reserved on the PIC16C641/642, always maintain this bit clear. |
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