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TAS2553 Folha de dados(PDF) 22 Page - Texas Instruments

Nome de Peças TAS2553
Descrição Electrónicos  TAS2553 2.8-W Class-D Mono Audio Amplifier with Class-G Boost and Speaker Sense
PDF  58 Pages
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Fabricante Electrônico  TI [Texas Instruments]
Página de início  http://www.ti.com
Logo TI - Texas Instruments

TAS2553 Folha de dados(HTML) 22 Page - Texas Instruments

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LD(n)
LD (n+1)
WORD
CLOCK
BIT
CLOCK
DATA
-
1
4
3
2
5
1
0
-
1
4
3
2
5
1
0
N
N
N
-
1
5
RD(n)
LEFT CHANNEL
RIGHT CHANNEL
LD(n) = n'th sample of left channel data
RD(n) = n'th sample of right channel data
LD(n)
LD(n+1)
WORD
CLOCK
BIT
CLOCK
DATA
-
1
-
2
-
3
2
1
0
3
-
1
-
2
-
3
2
1
0
3
-
1
-
2
N N N
N N N
N N N
-
3
3
RD (n)
LEFT CHANNEL
RIGHT CHANNEL
LD(n)=n'thsampleofleftchanneldata
RD(n)=n'thsampleofrightchanneldata
LD(n)
LD(n+1)
WORD
CLOCK
BIT
CLOCK
DATA
3
N
-
1
N
-
2
N
-
3
2
1
0
3
N
-
1
N
-
2
N
-
3
2
1
0
3
N
-
1
N
-
2
N
-
3
RD(n)
LEFT CHANNEL
RIGHT CHANNEL
LD(n)=n'thsampleofleftchanneldata
RD(n)=n'thsampleofrightchanneldata
TAS2553
SLAS978B – SEPTEMBER 2013 – REVISED FEBRUARY 2014
www.ti.com
Device Functional Modes (continued)
Figure 33. Timing Diagram for Left-Justified Mode with Offset=0 and Inverted Bit Clock
For left-justified mode, the number of bit-clocks per frame should be greater than twice the programmed word-
length of the data. Also, the programmed offset value should be less than the number of bit-clocks per frame by
at least the programmed word-length of the data.
7.4.1.3 I2S Mode
Set Register 0x03, D(7:6) = 01 and Register 0x05, D(3:2) = 00 to place the TAS2553 audio interface into I2S
mode. In I2S mode, the MSB of the left channel is valid on the second rising edge of the bit clock after the falling
edge of the word clock. Similarly the MSB of the right channel is valid on the second rising edge of the bit clock
after the rising edge of the word clock.
Figure 34. Timing Diagram for I2S Mode
Figure 35. Timing Diagram for I2S Mode with Offset=2
22
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Product Folder Links: TAS2553



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