AM4376_15 datasheet(6/261 Pages) TI

6 / 261 page

ARM

Cortex-A9

Up to 1000 MHz

32KB, 32KB L1

256KB L2, L3 RAM

64KB RAM

Graphics

POWERVR

SGX

3D GFX

20 MTri/s

Crypto

256KB

L3 RAM

Touchscreen Controller (TSC)

(A)

Display

Quad Core

PRU-ICSS

EtherCAT,

PROFINET,

EtherNet/IP,

EnDat

and more

L3 and L4 Interconnect

I C x3

UART x6

System Interface

EDMA

Timers x12

WDT

RTC

eHRPWM x6

eQEP, eCAP x3

JTAG, ETB

EMAC

2-port switch

10, 100, 1G

with 1588

(MII, RMII,

RGMII

and MDIO)

32b LPDDR2, DDR3, DDR3L

(B)

NAND, NOR, Async

(16-bit ECC)

Memory Interface

Processing: Overlay,

Resizing,Color Space

Conversion, and more

SPI x5

QSPI

CAN x2

HDQ, 1-Wire

ADC0 (8 inputs)

12-bit SAR

(A)

GPIO

Camera Interface

(2x Parallel)

MMC, SD,

SDIO x3

USB 2.0 Dual-Role

+ PHY x2

McASP x2

(4ch)

24-bit LCDCtrl (WXGA)

Simplified Power

Sequencing

ADC1 (8 inputs)

12-bit SAR

AM4376, AM4377, AM4378, AM4379

SPRS851B – JUNE 2014 – REVISED APRIL 2015

www.ti.com

1.4

Functional Block Diagram

Use of TSC will limit available ADC0 inputs.

Max clock: LPDDR2 = 266 MHz; DDR3/DDR3L = 400 MHz.

Figure 1-1. Functional Block Diagram

Device Overview

Submit Documentation Feedback

Product Folder Links: AM4376 AM4377 AM4378 AM4379

AM4376 Folha de dados(PDF) 6 Page - Texas Instruments

AM4376 Folha de dados(HTML) 6 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Folha de dados Download

Ligação URL