8745B-21 datasheet(1/19 Pages) IDT

Nome de Peças	8745B-21

Descrição Electrónicos	Differential CLK

PDF	19 Pages

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Fabricante Electrônico	IDT [Integrated Device Technology]

Página de início	http://www.idt.com

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8745B-21 Rev D 2/17/15

1

DATA SHEET

1:1 Differential-to-LVDS Zero Delay

Clock Generator

8745B-21

General Description

The 8745B-21 is a highly versatile 1:1 LVDS Clock Generator. The

8745B-21 has a fully integrated PLL and can be configured as zero

delay buffer, multiplier or divider, and has an output frequency range

of 31.25MHz to 700MHz. The Reference Divider, Feedback Divider

and Output Divider are each programmable, thereby allowing for the

following output-to-input frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4,

1:8. The external feedback allows the device to achieve “zero delay”

between the input clock and the output clock. The PLL_SEL pin can

be used to bypass the PLL for system test and debug purposes. In

bypass mode, the reference clock is routed around the PLL and into

the internal output dividers.

Features

• One differential LVDS output designed to meet

or exceed the requirements of ANSI TIA/EIA-644

One differential feedback output pair

• Differential CLK, nCLK input pair

• CLKx, nCLKx pair can accept the following differential

input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL

• Output frequency range: 31.25MHz to 700MHz

• Input frequency range: 31.25MHz to 700MHz

• VCO range: 250MHz to 700MHz

• External feedback for “zero delay” clock regeneration

with configurable frequencies

• Programmable dividers allow for the following output-to-input

frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8

• Cycle-to-cycle jitter: 30ps (maximum)

• Output skew: 35ps (maximum)

• Static phase offset: 25ps ± 125ps

• Full 3.3V supply voltage

• 0°C to 70°C ambient operating temperature

• Available in lead-free (RoHS 6) package

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

QFB

nQFB

VDDO

SEL2

FB_IN

nFB_IN

MR

nCLK

CLK

GND

SEL1

SEL0

VDD

PLL_SEL

VDDA

SEL3

GND

Q

nQ

VDDO

8745B-21

20-Lead SOIC

7.5mm x 12.8mm x 2.3mm package body

M Package

Top View

Block Diagram

PLL_SEL

CLK

nCLK

FB_IN

nFB_IN

SEL0

SEL1

SEL2

SEL3

MR

Q

nQ

QFB

nQFB

PLL

8:1, 4:1, 2:1, 1:1,

1:2, 1:4, 1:8

0

1

÷1, ÷2, ÷4, ÷8,

÷16, ÷32, ÷64

Pullup

Pulldown

Pullup

Pulldown

Pullup

Pulldown

Pin Assignment

Nº de peça semelhante - 8745B-21

Fabricante Electrônico	Nome de Peças	Folha de dados	Descrição Electrónicos
Renesas Technology Corp	8745B-21	519Kb / 20P	1:1 Differential-to-LVDS Zero Delay Clock Generator Rev D 2/17/15

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