IR36021 datasheet(21/41 Pages) IRF

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IR36021

DIGITAL POL BUCK CONTROLLER with I2C AND PMBus

Interface

February 27, 2013 | Rev 3.5

CURRENT BALANCING & OFFSET

The IR36021 provides accurate digital phase current

balancing for loop1 when it is configured to operate in

2‐phase mode. Current balancing equalizes the current

across the two phases. This improves efficiency, prevents

hotspots and reduces the possibility of inductor saturation.

The sensed currents for each phase are converted to a

voltage and are multiplexed into the monitor ADC.

The digitized currents are low‐pass filtered and passed

through a proprietary current balance algorithm to enable

the equalization of the current in two phases.

Figure 21 shows that due to component and layout

mismatches and other offsets in the control and

measurement circuits, the reported current values in the

GUI are a little different for the two phases (loop1) when

current balancing is disabled. Figure 22 shows that when

current balancing is enabled the current in two phases

become almost equal.

In addition, the IR36021 allows the user to offset phase

currents to optimize the thermal solution. Figure 23 shows

that Phase 1 current has been programmed to have

approximately 30% more current than the other phase.

30% is the maximum offset that can be applied in the

system. For the graphs shown in Figures 21, 22, and 23 the

load current has been measured by a multi‐meter whereas

the phase currents are the values reported in the GUI.

In addition to the low speed phase balancing, mentioned

above, there is a proprietary high‐speed active phase

current balancing (HSPB) which operates during load

transients. HSBP’s purpose is to eliminate current

imbalance that can result from a load current oscillating

near the switching frequency. The phase pulse widths are

compared and the largest pulse is skipped if its pulse width

exceeds an internally set threshold relative to the smallest

phase. This ensures that the phases remain balanced

during high frequency load transients.

High speed phase balancing (HSPB) and regular (low‐

speed) phase balancing can be activated/disabled

independently.

Phase Balancing Disabled

ILoad [A]

Figure 21: Phase Currents for a tested sample when phase

balancing is disabled. The current in phase 2 is a little more than

phase 1. The currents values are the reported GUI values.

Phase Balancing Enabled

ILoad [A]

Figure 22: Phase Currents measured when phase‐balancing is

activated for the same tested sample used for Figure 21 . The

currents in two phases are almost equal.

Phase Balancing Enabled, P1 30% more current

ILoad [A]

Figure 23: Phase Currents measured when phase‐balancing is

activated and the current in phase 1 is programmed to be about

30% more than the current in phase 2 (same tested sample).

CURRENT CALIBRATION

For optimizing the current measurement accuracy of a

design or even individual boards, the IR36021 contains a

Total Current Offset to zero the no‐load current reading.

Refer to Table 27 for output current calibration registers.

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