PM0044 datasheet(39/162 Pages) STMICROELECTRONICS

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PM0044

STM8 addressing modes

Doc ID 13590 Rev 3

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6.4

Indexed addressing mode (No Offset, Short, SP, Long,

Extended)

The data byte required for operation is found by its memory address, which is defined by the

unsigned addition of an index register (X or Y or SP) with an offset which follows the op-

code.

The indexed addressing mode is made of five sub-modes:

Table 24.

Overview Indexed addressing mode instructions

Addressing mode

Syntax

EA formula

Ptr Adr

Ptr Size

Dest adr

No offset

Direct Indexed

(ndx)

---

00..FFFF

Short

Direct Indexed

(shortoff,ndx) (ptr + ndx)

op + 1

Byte

00..100FE

Stack

Pointer

Direct Indexed

(shortoff,SP)

(ptr + SP)

op + 1

Byte

00..(FF+stacktop)

Long

Direct Indexed

(longoff,ndx)

(ptr.w + ndx) op + 1..2 Word

000000..01FFFE

Extended

Direct Indexed

(extoff,ndx)

(ptr.e + ndx) op + 1..3 Ext Word 000000..FFFFFF

Table 25.

No Offset, Long, Short and SP Indexed instructions

Instructions

Functions

LD, LDW

Load

CLR

Clear

Compare

AND, OR, XOR

Logical Operations

ADC, ADD, SUB, SBC, ADDW, SUBW

Arithmetic Addition/Subtraction operations

INC, DEC

Increment/Decrement

TNZ

Test Negative or Zero

CPL, NEG

1’s or 2’s Complement

SLA, SLL, SRL, SRA, RLC, RRC

Shift and Rotate Operations

SWAP

Swap Nibbles

Table 26.

No Offset, Long, Short Indexed Instructions

Instructions

Functions

CALL, JP

Call or Jump subroutine

Table 27.

Extended Indexed Instructions only

Instructions

Functions

LDF

Far Load

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