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AN4192 Folha de dados(PDF) 21 Page - STMicroelectronics

Nome de Peças AN4192
Descrição Electrónicos  In the latest generation of CPUs for modern desktop and notebook platforms
PDF  47 Pages
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Fabricante Electrônico  STMICROELECTRONICS [STMicroelectronics]
Página de início  http://www.st.com
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AN4192 Folha de dados(HTML) 21 Page - STMicroelectronics

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AN4192
Low-side FET selection
Doc ID 023820 Rev 1
21/47
In the following table the main electrical parameters of the two tested LS FETs are reported.
The high-side FET used is called “HS”.
As shown in the previous table, the “LS1” has higher RDS(on), but slightly lower total gate
charge. In Figure 21 the relevant efficiency curves are depicted; at low output currents, the
LS1, due to its slightly lower Qg and then switching/gate drive losses, has higher efficiency.
But, at medium and heavy load conditions, the RDS(on) improvement makes “LS2” the best
in terms of efficiency.
Figure 21.
Efficiency vs. Iout @ Vout = 1.25 V
3.2
CGD (Miller capacitance)
The Miller capacitance (Cgd) plays a crucial role in the LS switching behavior improvement.
As already known, before the HS turns on, the load current flows through the LS body-drain
diode (deadtime) (Figure 22, green trace, I2).
Table 3.
Main electrical parameters
BV [V]
RDS(on) [mΩ]Qg,SW [nC]
HS
25
13
8.5
LS1
30
6
15
LS2
25
5.2
18
AM16465V1



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