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L6717TR Folha de dados(PDF) 33 Page - STMicroelectronics |
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L6717TR Folha de dados(HTML) 33 Page - STMicroelectronics |
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33 / 56 page ![]() L6717 Power manager I2C Doc ID 17326 Rev 1 33/56 When the soft start is over and once PWRGOOD rise to Logic “1”, L6717 can receive commands on power manager I2C bus to enable DPM. Once DPM is enabled, L6717 starts monitoring the ILIM voltage: the voltage is compared with the internal VDPM threshold defining the current level to trigger the number modification. DPM is reset in particular conditions: – during OTF VID transition issued by the CPU; – when LTB Technology® detects a load transient. After being reset, DPM is re-enabled with a proper delay: the phase number is again defined according to the ILIM pin voltage with respect VDPM. Delay in the intervention of DPM can be adjusted by properly sizing the filer across ILIM pin. Increasing the capacitance results in increased delay in the DPM intervention. |
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