18

SCLK

Address

Data

Write Operation

Address

Data

Write Operation

Address

Data

Write Operation

Address

Next Read

Operation

SCLK

Data

Address

Address

SCLK

Required timing between Read and Write Commands

There are minimum timing requirements between read and write commands on the serial port.

Figure 19. Timing between two write commands

If the rising edge of the SCLK for the last data bit of the second write command occurs before the required delay

(tSWW), then the first write command may not complete correctly.

Figure 20. Timing between write and read commands

If the rising edge of SCLK for the last address bit of the read command occurs before the required delay (tSWR), the

write command may not complete correctly.

Figure 21. Timing between read and either write or subsequent read commands

During a read operation SCLK should be delayed at least tSRAD after the last address data bit to ensure that the ADNS-

7530 has time to prepare the requested data. The falling edge of SCLK for the first address bit of either the read or

write command must be at least tSRR or tSRW after the last SCLK rising edge of the last data bit of the previous read

operation.

Burst Mode Operation

Burst mode is a special serial port operation mode that may be used to reduce the serial transaction time for a motion

read. The speed improvement is achieved by continuous data clocking to or from multiple registers without the need

to specify the register address, and by not requiring the normal delay period between data bytes.

Burst mode is activated by reading the Motion_Burst register. The ADNS-7530 will respond with the contents of the

Motion, Delta_X_L, Delta_Y_L, Delta_XY_H, SQUAL, Shutter_Upper, Shutter_Lower and Maximum_Pixel registers in

that order. The burst transaction can be terminated anywhere in the sequence after the Delta_X value by bringing the

All data bits can be read with no delay between bytes by driving SCLK at the normal rate. The data are latched into the

output buffer after the last address bit is received. After the burst transmission is complete, the micro-controller must

NCS, even for a second burst transmission.

Motion_Burst Register Address

Read First Byte

First Read Operation

Read Second Byte

SCLK

Read Third Byte

Figure 22. Motion Burst Timing

PixArt Imaging Inc.

ADNS-7530 Integrated Molded Lead-Frame DIP Sensor

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PixArt Imaging Inc.