LTC1296CCSW datasheet(7/28 Pages) LINER

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LTC1293/LTC1294/LTC1296

129346fs

PI FU CTIO S

FUNCTION

DESCRIPTION

1 – 6

CH0 – CH5

Analog Inputs

The analog inputs must be free of noise with respect to AGND.

COM

Common

The common pin defines the zero reference point for all single ended inputs. It must be free of noise and is

usually tied to the analog ground plane.

DGND

Digital Ground

This is the ground for the internal logic. Tie to the ground plane.

–

Negative Supply

Tie V

– to most negative potential in the circuit (Ground in single supply applications).

AGND

Analog Ground

AGND should be tied directly to the analog ground plane.

VREF

Ref. Input

The reference inputs must be kept free of noise with respect to AGND.

DIN

Data Input

The A/D configuration word is shifted into this input.

DOUT

Digital Data Output The A/D conversion result is shifted out of this output.

Chip Select Input

A logic low on this input enables data transfer.

CLK

Clock

This clock synchronizes the serial data transfer and controls A/D conversion rate.

VCC

Positive supply

This supply must be kept free of noise and ripple by bypassing directly to the analog ground plane.

LTC1293

FUNCTION

DESCRIPTION

1 –8

CH0 – CH7

Analog Inputs

The analog inputs must be free of noise with respect to AGND.

COM

Common

The common pin defines the zero reference point for all single ended inputs. It must be free of noise and is

usually tied to the analog ground plane.

DGND

Digital Ground

This is the ground for the internal logic. Tie to the ground plane.

–

Negative Supply

Tie V

– to most negative potential in the circuit (Ground in single supply applications).

AGND

Analog Ground

AGND should be tied directly to the analog ground plane.

13, 14 REF

–, REF+ Ref. Inputs

The reference inputs must be kept free of noise with respect to AGND. The A/D sees a reference voltage equal

to the difference between REF

+ and REF–.

DIN

Data Input

The A/D configuration word is shifted into this input.

DOUT

Digital Data Output The A/D conversion result is shifted out of this output.

Chip Select Input

A logic low on this input enables data transfer.

CLK

Clock

This clock synchronizes the serial data transfer and controls A/D converion rate.

19, 20 AVCC, DVCC

Positive Supplies

These supplies must be kept free of noise and ripple by bypassing directly to the analog ground plane. AVCC

and DVCC must be tied together.

LTC1294

FUNCTION

DESCRIPTION

1 –8

CH0 – CH7

Analog Inputs

The analog inputs must be free of noise with respect to AGND.

COM

Common

The common pin defines the zero reference point for all single ended inputs. It must be free of noise and is

usually tied to the analog ground plane.

DGND

Digital Ground

This is the ground for the internal logic. Tie to the ground plane.

–

Negative Supply

Tie V

– to most negative potential in the circuit (Ground in single supply applications).

AGND

Analog Ground

AGND should be tied directly to the analog ground plane.

13, 14 REF

–, REF+ Ref. Inputs

The reference inputs must be kept free of noise with respect to AGND. The A/D sees a reference voltage equal

to the difference between REF

+ and REF–.

DIN

Data Input

The A/D configuration word is shifted into this input.

DOUT

Digital Data Output The A/D conversion result is shifted out of this output.

Chip Select Input

A logic low on this input enables data transfer.

CLK

Clock

This clock synchronizes the serial data transfer and controls A/D conversion rate.

SSO

System Shutdown

System Shutdown Output pin will go low when power shutdown is requested.

Output

VCC

Positive Supply

This supply must be kept free of noise and ripple by bypassing directly to the analog ground plane.

LTC1296

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