EVAL-AD1871EBZ datasheet(25/28 Pages) AD

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REV. 0

AD1871

–25–

INTERFACING

Analog Interfacing

The analog section of the AD1871 has been designed to offer

flexibility as well as high performance. Users may choose full

differential input directly to the ADC’s - modulator via Pins

CAPxP and CAPxN. Alternatively, when using the on-chip PGA

section, it is also possible to multiplex single-ended inputs on Pins

VINxP and VINxN or to use these pins for full differential input.

Whichever input topology is chosen (direct or via mux/PGA

section), the modulator input pins (CAPxP and CAPxN) require

capacitors to act as dynamic charge storage for the switched

capacitor input section. Component selection for these capacitors

is critical as the input audio signal appears on or across these

capacitors. A high quality dielectric is recommended for these

capacitors multilayer ceramic, NPO or metal film, PPS for

surface-mounted versions, and polypropylene for through-hole

versions. Indeed, as a general recommendation, high quality

dielectrics should be specified where capacitors are carrying the

input audio signal.

Modulator Direct Input

Figure 23 shows the connection of a single-ended source via an

external single-ended-to-differential converter to the modulator

input of the AD1871. The external amplifier/buffer should have

good slew rate characteristics to meet the dynamic characteristics

of the modulator input that is a switched-capacitor load.

The output of the external amplifier/buffer should be decoupled

from the input capacitors via a 250

W resistor (metal film).

In order to configure the AD1871 for differential input via the

CAPxP and CAPxN pins, the Mux/PGA section must be disabled

by setting the MEL and MER Bits in Control Register III to 1.

OP275

1nF

NPO

100pF

NPO

100pF

NPO

120pF

NPO

5.76k

750k

237

CAPLN

CAPLP

VREF

AD1871

10 F

FERRITE

100nF

237

100pF

NPO

5.76k

10 F

5.76k

OP275

Figure 23. Direct Connection to Modulator

PGA Input, Single-Ended

Figure 24 shows the connection of a single-ended source to the

PGA section of the AD1871. The PGA section is configured

for single-ended-to-differential conversion. The differential

outputs are connected internally to the CAPxx pins via 250

series resistors.

In order to configure the AD1871 for single-ended input, the

Control Registers must be configured as follows:

Left Channel

Control Register I = xx0xGGGxxx, where GGG = the Input Gain

(see Table V).

Control Register III = 00xx1x0Sxx, where S = the SE Channel

Selection.

Right Channel

Control Register I = xx0xxxxGGG, where GGG = the Input Gain

(see Table V).

Control Register III = 00xxx1xx0S, where S = the SE Channel

Selection.

1nF

NPO

100pF

NPO

100pF

NPO

CAPLN

CAPLP

AD1871

VREF

10 F

100nF

VINLP

VINLN

10 F

FERRITE

600Z

100pF

NPO

Figure 24. Single-Ended Input via PGA Section

PGA Input, Differential

Figure 25 shows the connection of a differential source to the PGA

section of the AD1871. The PGA section is configured as a

differential buffer. The buffered differential outputs are con-

nected internally to the CAPxx pins via a 250

W series resistors.

In order to configure the AD1871 for differential input via the

Mux/PGA, the Control Registers must be configured as follows:

Left Channel

Control Register I = xx0xGGGxxx, where GGG = the Input Gain

(see Table V).

Control Register III = 00xx0x0xxx.

Right Channel

Control Register I = xx0xxxxGGG, where GGG = the Input Gain

(see Table V).

Control Register III = 00xxx0xx0x.

1nF

NPO

100pF

NPO

100pF

NPO

CAPLN

CAPLP

AD1871

VREF

10 F

100nF

VINLP

VINLN

10 F

Figure 25. Differential Input via PGA Section

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