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EVAL-AD1871EBZ Folha de dados(PDF) 5 Page - Analog Devices

Nome de Peças EVAL-AD1871EBZ
Descrição Electrónicos  Stereo Audio, 24-Bit, 96 kHz, Multibit - ADC
PDF  28 Pages
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Fabricante Electrônico  AD [Analog Devices]
Página de início  http://www.analog.com
Logo AD - Analog Devices

EVAL-AD1871EBZ Folha de dados(HTML) 5 Page - Analog Devices

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AD1871
DATA INTERFACE TIMING (STANDALONE MODE–MASTER)
Mnemonic
Description
Min
Typ
Max
Unit
Comment
tBDLY
BCLK Delay
20
ns
From MCLK Rising
tBLDLY
LRCLK Delay to Low
10
ns
From BCLK Falling
tBDDLY
DOUT Delay
10
ns
From BCLK Falling
tBDDLY
BCLK
LRCLK
DOUT
LEFT-JUSTIFIED
MODE
DOUT
RIGHT-JUSTIFIED
MODE
LSB
DOUT
I2S-JUSTIFIED
MODE
tBDLY
tBLDLY
MSB
MSB–
MSB
MSB
8-BIT CLOCKS
(24-BIT DATA)
12-BIT CLOCKS
(20-BIT DATA)
16-BIT CLOCKS
(16-BIT DATA)
MCLK
1
Figure 2. Master Data Interface Timing



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