Os motores de busca de Datasheet de Componentes eletrônicos
  Portuguese  ▼
ALLDATASHEETPT.COM

X  

WM8731SEDS/V Folha de dados(PDF) 17 Page - Wolfson Microelectronics plc

Nome de Peças WM8731SEDS/V
Descrição Electrónicos  Portable Internet Audio CODEC with Headphone Driver and Programmable Sample Rates
PDF  65 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrônico  WOLFSON [Wolfson Microelectronics plc]
Página de início  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8731SEDS/V Folha de dados(HTML) 17 Page - Wolfson Microelectronics plc

Back Button WM8731SEDS/V Datasheet HTML 13Page - Wolfson Microelectronics plc WM8731SEDS/V Datasheet HTML 14Page - Wolfson Microelectronics plc WM8731SEDS/V Datasheet HTML 15Page - Wolfson Microelectronics plc WM8731SEDS/V Datasheet HTML 16Page - Wolfson Microelectronics plc WM8731SEDS/V Datasheet HTML 17Page - Wolfson Microelectronics plc WM8731SEDS/V Datasheet HTML 18Page - Wolfson Microelectronics plc WM8731SEDS/V Datasheet HTML 19Page - Wolfson Microelectronics plc WM8731SEDS/V Datasheet HTML 20Page - Wolfson Microelectronics plc WM8731SEDS/V Datasheet HTML 21Page - Wolfson Microelectronics plc Next Button
Zoom Inzoom in Zoom Outzoom out
 17 / 65 page
background image
WM8731 / WM8731L
Production Data
w
PD, Rev 4.9, October 2012
17
DIGITAL AUDIO INTERFACE – SLAVE MODE
BCLK
ADCDAT
ADCLRC
DACDAT
DACLRC
WM8731
CODEC
DSP
ENCODER/
DECODER
Note: The ADC and DAC can run at different rates
Figure 5 Slave Mode Connection
BCLK
DACLRC/
ADCLRC
t
BCH
t
BCL
t
BCY
DACDAT
ADCDAT
t
LRSU
t
DS
t
LRH
t
DH
t
DD
Figure 6 Digital Audio Data Timing – Slave Mode
Test Conditions
AVDD, HPVDD, DBVDD = 3.3V, AGND = 0V, DCVDD = 1.5V, DGND = 0V, TA = +25
oC, Slave Mode, fs = 48kHz, XTI/MCLK =
256fs unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Audio Data Input Timing Information
BCLK cycle time
tBCY
50
ns
BCLK pulse width high
tBCH
20
ns
BCLK pulse width low
tBCL
20
ns
DACLRC/ADCLRC set-up
time to BCLK rising edge
tLRSU
10
ns
DACLRC/ADCLRC hold
time from BCLK rising edge
tLRH
10
ns
DACDAT set-up time to
BCLK rising edge
tDS
10
ns
DACDAT hold time from
BCLK rising edge
tDH
10
ns



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65


Folha de dados Download

Go To PDF Page


Ligação URL



ALLDATASHEET é útil para você?  [ DONATE ] 

Sobre Alldatasheet   |   Publicidade   |   Contato conosco   |   Privacy Policy   |   Link para a ficha técnica    |   roca de Link   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com