OP177BZ datasheet(2/12 Pages) AD

2 / 12 page

OP177A

OP177B

Parameter

Symbol

Conditions

Min

Typ

Max

Min

Typ

Max

Units

Input Offset Voltage

VOS

410

µV

Long-Term Input Offset Voltage Stability

∆V

OS/Time

(Note 1)

0.2

µV/Mo

Input Offset Current

IOS

0.3

1.0

0.3

1.5

Input Bias Current

–0.2

1.5

–0.2

2.0

Input Noise Voltage

fo = 1 Hz to 100 Hz

118

150

118

150

nV rms

Input Noise Current

fo = 1 Hz to 100 Hz

pA rms

Input Resistance Differential-Mode

RIN

(Note 3)

Ω

Input Resistance Common-Mode

RINCM

200

Ω

Input Voltage Range

IVR

(Note 4)

±13

±14

±13

±14

Common-Mode Rejection Ratio

CMRR

VCM = ± 13 V

130

140

130

140

Power Supply Rejection Ratio

PSRR

VS = ± 3 V to ± 18 V

120

125

115

125

Large Signal Voltage Gain

AVO

RL ≥ 2 kΩ, VO = ± 10 V

5000

12000

5000

12000

V/mV

Output Voltage Swing

RL ≥ 10 kΩ± 13.5

±14.0

±13.5 ±14.0

RL ≥ 2 kΩ± 12.5

±13.0

±12.5 ±13.0

RL ≥ 1 kΩ± 12.0

±12.5

±12.0 ±12.5

Slew Rate

RL ≥ 2 kΩ

0.1

0.3

0.1

0.3

µs

Closed-Loop Bandwidth

AVCL = +1

0.4

0.6

0.4

0.6

MHz

Open-Loop Output Resistance

Ω

Power Consumption

VS = ± 15 V, No Load

VS = ± 3 V, No Load

3.5

4.5

3.5

4.5

Supply Current

ISY

VS = ± 15 V, No Load

1.6

2.0

1.6

2.0

Offset Adjustment Range

Rp = 20 k

Ω

±3

±3mV

NOTES

1Long-Term Input Offset Voltage Stability refers to the averaged trend line of V

OS vs. Time over extended periods after the first 30 days of operation. Excluding the

initial hour of operation, changes in VOS during the first 30 operating days are typically less than 2.0 µV.

2Sample tested.

3Guaranteed by design.

4Guaranteed by CMRR test condition.

5To insure high open-loop gain throughout the

±10 V output range, A

VO is tested at –10 V ≤ VO ≤ 0 V, 0 V ≤ VO ≤ +10 V, and –10 V ≤ VO ≤ +10 V.

Specifications subject to change without notice.

REV. B

–2–

OP177–SPECIFICATIONS

ELECTRICAL CHARACTERISTICS (@ VS = 15 V, TA = +25 C, unless otherwise noted)

ELECTRICAL CHARACTERISTICS

OP177A

OP177B

Parameter

Symbol

Conditions

Min

Typ

Max

Min

Typ

Max

Units

Input Offset Voltage

VOS

µV

Average Input Offset Voltage Drift

TCVOS

(Note 1)

0.03

0.1

0.3

µV/°C

Input Offset Current

IOS

0.5

1.5

0.5

2.0

Average Input Offset Current Drift

TCIOS

(Note 2)

1.5

pA/

°C

Input Bias Current

–0.2

2.4

–0.2

2.4

Average Input Bias Current Drift

TCIB

(Note 2)

pA/

°C

Input Voltage Range

IVR

(Note 3)

±13

±13.5

±13

±13.5

Common-Mode Rejection Ratio

CMRR

VCM = ± 13 V

120

140

120

140

Power Supply Rejection Ratio

PSRR

VS = ± 3 V to ± 18 V

120

125

110

120

Large-Signal Voltage Gain

AVO

RL ≥ 2 kΩ, VO = ± 10 V

2000

6000

2000

6000

V/mV

Output Voltage Swing

RL ≥ 2 kΩ± 12

±13.0

±12

±13.0

Power Consumption

VS = ± 15 V, No Load

Supply Current

ISY

VS = ± 15 V, No Load

2.0

2.5

2.0

2.5

NOTES

1TCV

OS is 100% tested.

2Guaranteed by endpoint limits.

3Guaranteed by CMRR test condition.

4To insure high open-loop gain throughout the

± 10 V output range, A

VO is tested at –10 V ≤ VO ≤ 0 V, 0 V ≤ VO ≤ +10 V, and –10 V ≤ VO ≤ +10 V.

Specifications subject to change without notice.

(@ VS =

15 V, –55

°C ≤ T

≤ +125 C, unless otherwise noted)

OP177BZ Folha de dados(PDF) 2 Page - Analog Devices

OP177BZ Folha de dados(HTML) 2 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12

Folha de dados Download

Ligação URL