AD7875LP datasheet(4/20 Pages) AD

4 / 20 page

REV. B

AD7870/AD7875/AD7876

–4–

TIMING CHARACTERISTICS1, 2

Limit at TMIN, TMAX

Parameter

(J, K, L, A, B, C Versions)

(S, T Versions)

Units

Conditions/Comments

ns min

CONVST Pulse Width

ns min

CS to RD Setup Time (Mode 1)

ns min

RD Pulse Width

ns min

CS to RD Hold Time (Mode 1)

ns max

RD to INT Delay

ns max

Data Access Time after

ns min

Bus Relinquish Time after

ns max

ns min

HBEN to

RD Setup Time

ns min

HBEN to

RD Hold Time

t10

100

ns min

SSTRB to SCLK Falling Edge Setup Time

t11

370

ns min

SCLK Cycle Time

t12

135

150

ns max

SCLK to Valid Data Delay. CL = 35 pF

t13

ns min

SCLK Rising Edge to

SSTRB

100

ns max

t14

ns min

Bus Relinquish Time after SCLK

100

ns max

t15

ns min

CS to RD Setup Time (Mode 2)

t16

120

ns max

CS to BUSY Propagation Delay

t17

200

ns min

Data Setup Time Prior to

BUSY

t18

ns min

CS to RD Hold Time (Mode 2)

t19

ns min

HBEN to

CS Setup Time

t20

ns min

HBEN to

CS Hold Time

NOTES

1Timing specifications in bold print are 100% production tested. All other times are sample tested at +25

°C to ensure compliance. All input signals are

specified with tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V.

2Serial timing is measured with a 4.7 k

Ω pull-up resistor on SDATA and SSTRB and a 2 kΩ pull-up on SCLK. The capacitance on all three outputs is 35 pF.

6 is measured with the load circuits of Figure 1 and defined as the time required for an output to cross 0.8 V or 2.4 V.

7 is defined as the time required for the data lines to change 0.5 V when loaded with the circuits of Figure 2.

5SCLK mark/space ratio (measured from a voltage level of 1.6 V) is 40/60 to 60/40.

6SDATA will drive higher capacitive loads but this will add to t

12 since it increases the external RC time constant (4.7 k Ω CL) and hence the time to reach 2.4 V.

Specifications subject to chance without notice.

(VDD = +5 V

5%, VSS = –5 V

5%, AGND = DGND = 0 V. See Figures 9, 10, 11 and 12.)

ABSOLUTE MAXIMUM RATINGS*

VDD to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V

VSS to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –7 V

AGND to DGND . . . . . . . . . . . . . . . . . –0.3 V to VDD +0.3 V

VIN to AGND . . . . . . . . . . . . . . . . . . . . . . . . . –15 V to +15 V

REF OUT to AGND . . . . . . . . . . . . . . . . . . . . . . . . 0 V to VDD

Digital Inputs to DGND . . . . . . . . . . . . –0.3 V to VDD +0.3 V

Digital Outputs to DGND . . . . . . . . . . . –0.3 V to VDD +0.3 V

Operating Temperature Range

Commercial (J, K, L Versions – AD7870) . . . 0

°C to +70°C

Commercial (K, L Versions – AD7875) . . . . . 0

°C to +70°C

Industrial (A, B, C Versions – AD7870) . . . . –25

°C to +85°C

Industrial (B, C Versions – AD7875/AD7876)

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40

°C to +85°C

Extended (S, T Versions) . . . . . . . . . . . . . . –55

°C to +125°C

Storage Temperature Range . . . . . . . . . . . . . –65

°C to +150°C

Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . +300

°C

Power Dissipation (Any Package) to +75

°C . . . . . . . . .450 mW

Derates above +75

°C by . . . . . . . . . . . . . . . . . . . . . 10 mW/°C

*Stresses above those listed under “Absolute Maximum Ratings” may cause

permanent damage to the device. This is a stress rating only; functional

operation of the device at these or any other conditions above those listed in

the operational sections of this specification is not implied. Exposure

to absolute maximum rating conditions for extended periods may affect

device reliability.

a. High-Z to VOH

b. High-Z to VOL

Figure 1. Load Circuits for Access Time

a. VOH to High-Z

b. VOL to High-Z

Figure 2. Load Circuits for Output Float Delay

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection. Although

the AD7870/AD7875/AD7876 feature proprietary ESD protection circuitry, permanent damage

may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD

precautions are recommended to avoid performance degradation or loss of functionality.

WARNING!

ESD SENSITIVE DEVICE

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