A4491 datasheet(10/16 Pages) ALLEGRO

10 / 16 page

Triple Output Step-Down Switching Regulator

A4491

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

The maximum peak-to-peak ripple current, IRIPPLE, occurs at the

maximum input voltage. Therefore the duty cycle, D, should be

found under these conditions (for the VREG1 channel):

D(min) =

VREG1+Vf

VBB(max)+Vf

(3)

where Vf is the forward voltage drop of the recirculation diode.

The required inductance can be found:

L (min)

D(min)

IRIPPLE

VBB(max) – VREG1

fSW(min)

××

(4)

Note that the manufacturers inductance tolerance should also

be taken into account. This value may be as high as ±20%. The

peak-to-peak current should not exceed 1 A, to avoid instability

in the innermost circuit loops due to insufficient slope compensa-

tion.

The maximum peak current can be found from to ensure that the

saturation current level of the chosen inductor is not exceeded:

Isat

ILOAD +

IRIPPLE

(5)

Recommended inductor manufacturers and ranges are:

• Taiyo Yuden: NR6045 series for 1.5 A outputs

• Taiyo Yuden: NRG4026 series for 1.0 A outputs

• Sumida: CDH74 series for 1.5 A outputs

Output Capacitor In the interests of size, cost and perfor-

mance, it is highly recommended that ceramic X5R or X7R

capacitor types be used. When using ceramic capacitors another

important consideration is the E-field effects on the actual value

of the capacitor. To minimize the effects of the capacitance

reducing with output voltage, it is recommended that the working

voltage of the capacitor be considerably more than the set output

voltage. As a suggestion, it is recommended that 6.3 V-rated

capacitors should be used for output voltages of 3.3 V and below.

For output voltages of 5 V, a 10 V-rated capacitor should be used.

The output capacitor determines the output voltage ripple and is

used to close the control loop. To guarantee stability, the capaci-

tance has to increase as the output voltage is reduced. This is

actually reasonable from a ripple voltage point of view, as the

ripple voltage is typically specified as a percentage of output

voltage.

The following table outlines what the minimum output capaci-

tance should be for a given output voltage:

Output Voltage

(V)

Minimum Output Capacitance

(μF)

510

3.3

1.8 to 2.5

<1.8

Capacitance values with greater than the above values can be

used with the effect of reducing the bandwidth. This may be nec-

essary in systems that have extremely low ripple/noise require-

ments.

The output ripple is largely determined by the output capacitance

and the effects of ESR and ESL can largely be ignored assuming

good layout practice is observed.

The output voltage ripple can be approximated to:

VRIPPLE ≈

IRIPPLE

8 × fSW × COUT

(6)

When using ceramic capacitors, there is generally no need to con-

sider the current carrying capability due to the negligible heating

effects of the ESR. Also, the rms current flowing into the output

capacitor is extremely low.

Input Capacitor Again it is highly recommended that ceramic,

X5R or X7R capacitors be used.

The value of the input capacitance determines the amount of

current ripple (EMI) that appears at the source (VBB supply)

terminals. The amounts of current flowing in and out of the input

capacitor depend on the relative impedances between the input

capacitor impedance and the source impedance. To achieve a low

impedance filter solution it is recommended to place at least two

capacitors in parallel.

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