CY25404 datasheet(7/13 Pages) CYPRESS

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CY25404

Document #: 001-43258 Rev. *C

Page 7 of 13

AC Electrical Specifications

Parameter

Description

Conditions

Min

Typ

Max

Unit

FIN (crystal)

Crystal frequency, XIN

–

MHz

FIN (clock)

Input clock frequency, EXCLKIN

–

8–

166

MHz

FCLK

Output clock frequency

–

166

MHz

DC1

Output duty cycle, All clocks

except Ref Out

Duty cycle is defined in Figure 3 on page 8; t1/t2,

measured at 50% of VDD_CLK_BX

DC2

Ref out duty cycle

Ref In Min 45%, Max 55%

–

TRF1

[1]

Output rise/fall time

Measured from 20% to 80% of VDD_CLK_BX, as

shown in Figure 4 on page 8, CLOAD = 15 pF, Drive

strength [00]

–6.8

–

TRF2

[1]

Output rise/fall time

Measured from 20% to 80% of VDD_CLK_BX, as

shown in Figure 4 on page 8, CLOAD = 15 pF, Drive

strength [01]

–3.4

–

TRF3

[1]

Output rise/fall time

Measured from 20% to 80% of VDD_CLK_BX, as

shown in Figure 4 on page 8, CLOAD = 15 pF, Drive

strength [10]

–2.0

–

TRF4

[1]

Output rise/fall time

Measured from 20% to 80% of VDD_CLK_BX, as

shown in Figure 4 on page 8, CLOAD = 15 pF, Drive

strength [11]

–1.0

–

TCCJ

[1,2]

Cycle-to-cycle jitter (peak)

Configuration dependent. See Table 3

–100

–

TLOCK

[1]

PLL lock time

Measured from 90% of the applied power supply

level

–1

Table 3. Configuration Example for C-C Jitter

Ref. Freq.

(MHz)

CLK1 Output

CLK2 Output

CLK3 Output

CLK4 Output

CLK5 Output

Freq.

(MHz)

C-C Jitter

Typ (ps)

Freq.

(MHz)

C-C Jitter

Typ (ps)

Freq.

(MHz)

C-C Jitter

Typ (ps)

Freq.

(MHz)

C-C Jitter

Typ (ps)

Freq.

(MHz)

C-C Jitter

Typ (ps)

14.3181

8.0

134

166

103

74.25

Not Used

19.2

74.25

166

110

109

166

103

74.25

Not Used

123

166

137

166

138

103

Recommended Crystal Specification for SMD Package

Parameter

Description

Range 1

Range 2 Range 3

Unit

FIN

Crystal frequency

8 – 14

14 – 28

28 – 48

MHz

Maximum motional resistance (ESR)

135



Parallel load capacitance (device has internal load capacitance adjustment

feature)

8 – 18

8 – 14

8 – 12

DL(max)

Maximum crystal drive level

300

µW

Recommended Crystal Specification for Thru-Hole Package

Parameter

Description

Range 1

Range 2 Range 3

Unit

FIN

Crystal frequency

8 – 14

14 – 24

24 – 32

MHz

Maximum motional resistance (ESR)



Parallel load capacitance (device has internal load capacitance

adjustment feature)

8 – 18

8 – 12

DL(max)

Maximum crystal drive level

1000

µW

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