dsPIC30F2011 datasheet(46/206 Pages) MICROCHIP

46 / 206 page

dsPIC30F2011/2012/3012/3013

DS70139F-page 46

4.2.3

MODULO ADDRESSING

APPLICABILITY

Modulo Addressing can be applied to the Effective

Address (EA) calculation associated with any W

boundaries check for addresses less than, or greater

than the upper (for incrementing buffers), and lower (for

decrementing buffers) boundary addresses (not just

equal to). Address changes may, therefore, jump

beyond boundaries and still be adjusted correctly.

4.3

Bit-Reversed Addressing

Bit-Reversed Addressing is intended to simplify data

re-ordering for radix-2 FFT algorithms. It is supported

by the X AGU for data writes only.

The modifier, which may be a constant value or register

contents, is regarded as having its bit order reversed. The

address source and destination are kept in normal order.

Thus, the only operand requiring reversal is the modifier.

4.3.1

BIT-REVERSED ADDRESSING

IMPLEMENTATION

Bit-Reversed Addressing is enabled when:

• BWM (W register selection) in the MODCON reg-

ister is any value other than ‘15’ (the stack cannot

be accessed using Bit-Reversed Addressing) and

• the BREN bit is set in the XBREV register and

• the addressing mode used is Register Indirect

with Pre-Increment or Post-Increment.

If the length of a bit-reversed buffer is M = 2N bytes,

then the last ‘N’ bits of the data buffer Start address

must be zeros.

XB<14:0> is the bit-reversed address modifier or ‘pivot

point’ which is typically a constant. In the case of an

FFT computation, its value is equal to half of the FFT

data buffer size.

When enabled, Bit-Reversed Addressing is only

executed for register indirect with pre-increment or

post-increment addressing and word-sized data writes.

It does not function for any other addressing mode or

for byte-sized data. Normal addresses are generated

instead. When Bit-Reversed Addressing is active, the

W address pointer is always added to the address

modifier (XB) and the offset associated with the

addition, as word-sized data is a requirement, the LSb

of the EA is ignored (and always clear).

If Bit-Reversed Addressing has already been enabled

by setting the BREN (XBREV<15>) bit, then a write to

the XBREV register should not be immediately followed

by an indirect read operation using the W register that

has been designated as the bit-reversed pointer.

Note:

The modulo corrected Effective Address is

written back to the register only when

Pre-Modify or Post-Modify Addressing

mode is used to compute the Effective

Address.

When

address

offset

(e.g., [W7+W2]) is used, Modulo address

correction is performed, but the contents

of the register remain unchanged.

Note:

All bit-reversed EA calculations assume

word-sized data (LSb of every EA is

always clear). The XB value is scaled

accordingly to generate compatible (byte)

addresses.

Note:

Modulo Addressing and Bit-Reversed

Addressing

should

not

enabled

together. In the event that the user attempts

to do this, Bit-Reversed Addressing

assumes priority when active for the X

WAGU, and X WAGU Modulo Addressing

is disabled. However, Modulo Addressing

continues to function in the X RAGU.

dsPIC30F2011 Folha de dados(PDF) 46 Page - Microchip Technology

dsPIC30F2011 Folha de dados(HTML) 46 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Folha de dados Download

Ligação URL