LTC1749 datasheet(14/20 Pages) LINER

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LTC1749

1749f

can be configured in a noise gain of +2 with the addition of

two equal valued resistors between the output and invert-

ing input and between the two inputs. This however will raise

the noise contributed by the op amps.

Reference Operation

Figure 5 shows the LTC1749 equivalent reference circuitry

consisting of a 2V bandgap reference, a 3-to-1 switch, a

switch control circuit and a difference amplifier.

The 2V bandgap reference serves two functions. First, it is

assessable at the VCM pin to provide a DC bias point for

setting the common mode voltage of any external input

circuitry. Second, it is used to derive internal reference

levels that may be used to set the input range of the ADC.

An external bypass capacitor is required for the 2V refer-

ence output at the VCM pin. This provides a high frequency

low impedance path to ground for internal and external

circuitry. This is also the compensation capacitor for the

reference, which will not be stable without this capacitor.

To achieve the optimal input range for an application, the

internal reference voltage (VREF) is flexible. The reference

switch shown in Figure 5 connects VREF to one of two

internally derived reference voltages, or to an externally

derived reference voltage. The internally derived refer-

ences are selected by strapping the SENSE pin to GND for

0.7V, or to VDD for 1.125V. When 0.7V > VSENSE > 1.125V,

VSENSE is directly connected to VREF. Because of the dual

nature of the SENSE pin, driving it with a logic device is not

recommended.

Reference voltages between 0.7V and 1.125V may be

programmed with two external resistors as shown in

Figure 6a. An external reference may be used by applying

its output directly or through a resistor divider to the

SENSE pin (Figure 6b). When the SENSE pin is driven with

an externally derived reference voltage, it should be by-

passed to ground as close to the device as possible with

a 1

µF ceramic capacitor.

A difference amplifier generates the high and low refer-

ences for the ADC. High speed switching circuits are

connected to these outputs and they must be externally

bypassed. Each output has two pins: REFHA and REFHB

for the high reference and REFLA and REFLB for the low

reference. The doubled output pins are needed to reduce

package inductance. Bypass capacitors must be con-

nected as shown in Figure 5.

APPLICATIO S I FOR ATIO

VCM

REFHA

REFLB

SENSE

TIE TO VDD FOR VREF = 1.125;

TIE TO GND FOR VREF = 0.7V;

VREF = VSENSE FOR

0.7V < VSENSE < 1.125V

REFLA

REFHB

4.7

µF

4.7

µF

INTERNAL ADC

HIGH REFERENCE

BUFFER

VREF

0.1

µF

1749 F05

LTC1749

Ω

DIFF AMP

µF

0.1

µF

INTERNAL ADC

LOW REFERENCE

2V BANDGAP

REFERENCE

1.125V 0.7V

RANGE

DETECT

AND

CONTROL

Figure 5. Equivalent Reference Circuit

Figure 4. Differential Drive with Op Amps

Ω

SINGLE-ENDED

INPUT

±1/2

RANGE

VCM

AIN

–

12pF

1749 F04

4.7

µF

Ω

100

Ω

500

Ω

500

Ω

LTC1749

–

1/2 LT1818

–

1/2 LT1818

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