MPC5533 datasheet(35/50 Pages) FREESCALE

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Electrical Characteristics

MPC5533 Microcontroller Data Sheet, Rev. 0.0

Freescale Semiconductor

3.13.5

External Interrupt Timing (IRQ Signals)

7 5

Input signal valid to

CLKOUT positive edge

(setup time)

External bus interface

ADDR[8:31]

DATA[0:15]

RD_WR

tCIS

10.0

—10.0—

10.0

—ns

8 5

CLKOUT positive edge to

input signal invalid (hold

time)

External bus interface

ADDR[8:31]

DATA[0:15]

RD_WR

tCIH

1.0

—1.0

—

1.0

—ns

1 EBI timing specified at V

DDE = 1.6–3.6 V (unless stated otherwise), TA = TL to TH, and CL = 30 pF with DSC = 0b10.

2 The external bus is limited to half the speed of the internal bus.

3 Speed is the nominal maximum frequency. Max speed is the maximum speed allowed including frequency modulation (FM).

42 MHz parts allow for 40 MHz system clock + 2% FM; 68 MHz parts allow for a 66 MHz system clock + 2% FM, and

82 MHz parts allow for 80 MHz system clock + 2% FM.

4 Refer to fast pad timing in Table 17 and Table 18 (different values for 1.8 V and 3.3 V).

5 Available on the 324 package only; not available on the 208 package.

6 EBTS = 0 timings are tested and valid at V

DDE = 2.25–3.6 V only; EBTS = 1 timings are tested and valid at VDDE = 1.6–3.6 V.

Table 23. External Interrupt Timing 1

1 IRQ timing specified at: V

DDEH = 3.0–5.25 V and TA = TL to TH.

Spec

Characteristic

Symbol

Min.

Max.

Unit

IRQ pulse-width low

tIPWL

3—

tCYC

IRQ pulse-width high

TIPWH

3—

tCYC

IRQ edge-to-edge time 2

2 Applies when IRQ signals are configured for rising-edge or falling-edge events, but not both.

tICYC

6—

tCYC

Table 22. External Bus Operation Timing1, 2 (continued)

Spec

Characteristic

and

Description

Symbol

External Bus Frequency 3

Unit

Notes

20 MHz

33 MHz

40 MHz

Min.

Max

Min.

Max

Min.

Max

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