SH7708 datasheet(178/633 Pages) RENESAS

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3. Crystal Oscillator: This oscillator is used when a crystal oscillator element is connected to the

XTAL and EXTAL pins. It operates according to the clock operating mode setting.

4. Divider 1: Divider 1 generates a clock at the operating frequency used by the internal clock.

The operating frequency can be 1, 1/2, 1/3*, or 1/4 times the output frequency of PLL circuit 1,

as long as it stays at or above the clock frequency of the CKIO pin. The division ratio is set in

the frequency control register.

5. Divider 2: Divider 2 generates a clock at the operating frequency used by the peripheral clock.

The operating frequencies can be 1, 1/2, 1/3*, or 1/4 times the output frequency of PLL Circuit

1 or the clock frequency of the CKIO pin, as long as it stays at or below the clock frequency of

the CKIO pin. The division ratio is set in the frequency control register.

6. Clock Frequency Control Circuit: The clock frequency control circuit controls the clock

frequency using the MD pin and the frequency control register.

7. Standby Control Circuit: The standby control circuit controls the status of the clock pulse

generator and other modules during clock switching and sleep/standby modes.

8. Frequency Control Register: The frequency control register has control bits assigned for the

following functions: clock output/non-output from the CKIO pin, on/off control of PLL circuit

1, PLL standby, the frequency multiplication ratio of PLL 1, and the frequency division ratio

of the internal clock and the peripheral clock.

9. Standby Control Register: The standby control register has bits for controlling the power-down

modes. See section 8, Power-Down Modes, for more information.

Note: * SH7708R only

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