SH7708 datasheet(80/633 Pages) RENESAS

Nome de Peças	SH7708

Descrição Electrónicos	SuperH??RISC engine

PDF	633 Pages

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Fabricante Electrônico	RENESAS [Renesas Technology Corp]

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3.3.2

TLB Indexing

The TLB uses a 4-way set associative scheme, so entries must be selected by index. VPN bits 16

to 12 are used as the index number regardless of the page size. The index number can be generated

in two different ways depending on the setting of the IX bit in MMUCR.

1. When IX = 0, VPN bits 16–12 alone are used as the index number

2. When IX = 1, VPN bits 16–12 are EX-ORed with ASID bits 4–0 to generate a 5-bit index

number

The second method is used to prevent lowered TLB efficiency that results when multiple

processes run simultaneously in the same virtual address space and a specific entry is selected by

indexing of each process. Figures 3.6 and 3.7 show the indexing schemes.

PTEH register

Virtual address

VPN

ASID

Index

ASID(4–0)

Exclusive-OR

Way 0–3

VPN(31–17)

VPN(11–10)

ASID(7–0)

Address array

Data array

PPN(31–10) PR(1–0) SZ

Figure 3.6 TLB Indexing (IX = 1)

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